| Message ID | 884c683fb6c1d1bf7d0d383a8df8f65a0a424dc7.1718890849.git.geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 4054c40b6c1d9a1c4ac942b938a1f4678d28023f |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | dts: renesas: Add missing hypervisor virtual timer IRQs and interrupt-names | expand |
On 20.06.2024 16:57, Geert Uytterhoeven wrote: > Add the missing fifth interrupt to the device node that represents the > ARM architected timer. While at it, add an interrupt-names property for > clarity, > > Fixes: e20396d65b959a65 ("arm64: dts: renesas: Add initial DTSI for RZ/G3S SoC") > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > --- > arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi > index 2162c247d6deb170..0d5c47a65e46c584 100644 > --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi > +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi > @@ -294,6 +294,9 @@ timer { > interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, > <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, > <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, > - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; > + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, > + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; > + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", > + "hyp-virt"; > }; > };
diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi index 2162c247d6deb170..0d5c47a65e46c584 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi @@ -294,6 +294,9 @@ timer { interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", + "hyp-virt"; }; };
Add the missing fifth interrupt to the device node that represents the ARM architected timer. While at it, add an interrupt-names property for clarity, Fixes: e20396d65b959a65 ("arm64: dts: renesas: Add initial DTSI for RZ/G3S SoC") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)