From patchwork Thu Feb 4 14:29:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 8223181 Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8A95EBEEE5 for ; Thu, 4 Feb 2016 14:32:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D3F6B201D3 for ; Thu, 4 Feb 2016 14:32:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0999C20395 for ; Thu, 4 Feb 2016 14:32:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757696AbcBDObY (ORCPT ); Thu, 4 Feb 2016 09:31:24 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:49245 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756661AbcBDObY (ORCPT ); Thu, 4 Feb 2016 09:31:24 -0500 Received: from penelope.kanocho.kobe.vergenet.net (d54c0ad22.access.telenet.be [84.192.173.34]) by kirsty.vergenet.net (Postfix) with ESMTPSA id ADA4F25B7A4; Fri, 5 Feb 2016 01:30:25 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1454596226; bh=fuQVBzC5bzJYMaN0fvEXhFbhksAUekmi96hTDpPr0S8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HbscFCYA4NSeW7zzBYCMHVZJJ8Whzrzlut+tQ8K5VX4OMsr/o+aRAfAsT+v+wPlx9 adahgerhsJq+oaOsoHPnns9YviXem4FC2IuWK4aHBEzJgTanMJONog2ULHpAzG9MSq JudeWYPokVj2/4b5gK7Sjd8u+CdlZcJPT2RIUkWc= Received: by penelope.kanocho.kobe.vergenet.net (Postfix, from userid 7100) id B2A0461016; Fri, 5 Feb 2016 01:30:05 +1100 (AEDT) From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Geert Uytterhoeven , Simon Horman Subject: [PATCH 59/70] ARM: dts: r8a7790: Add BRG support for (H)SCIF Date: Thu, 4 Feb 2016 15:29:53 +0100 Message-Id: X-Mailer: git-send-email 2.7.0.rc3.207.g0ac5344 In-Reply-To: References: Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depends on the actual board. Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF and HSCIF device nodes. This increases the range and accuracy of supported baud rates on (H)SCIF. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 29 +++++++++++++++++++++-------- 1 file changed, 21 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index c5672745a1e5..c9583fa6cae7 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -667,8 +667,9 @@ "renesas,scif"; reg = <0 0xe6e60000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7790_CLK_SCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7790_CLK_SCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -680,8 +681,9 @@ "renesas,scif"; reg = <0 0xe6e68000 0 64>; interrupts = ; - clocks = <&mstp7_clks R8A7790_CLK_SCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7790_CLK_SCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -693,8 +695,9 @@ "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c0000 0 96>; interrupts = ; - clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -706,8 +709,9 @@ "renesas,rcar-gen2-hscif", "renesas,hscif"; reg = <0 0xe62c8000 0 96>; interrupts = ; - clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>; - clock-names = "fck"; + clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; dma-names = "tx", "rx"; power-domains = <&cpg_clocks>; @@ -996,6 +1000,15 @@ clock-output-names = "audio_clk_c"; }; + /* External SCIF clock */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + status = "disabled"; + }; + /* External USB clock - can be overridden by the board */ usb_extal_clk: usb_extal_clk { compatible = "fixed-clock";