Message ID | ccab4fa198225edcd3750f62532a1ee3c6d2a109.1693481518.git.geert+renesas@glider.be (mailing list archive) |
---|---|
State | Mainlined |
Commit | 175f1971164a6f8f351907ea9fadb38d8406ffc8 |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | ARM: dts: renesas: LBSC and FLASH improvements | expand |
diff --git a/arch/arm/boot/dts/renesas/r7s72100.dtsi b/arch/arm/boot/dts/renesas/r7s72100.dtsi index b07b71307f24ad59..e6d8da6faffb5576 100644 --- a/arch/arm/boot/dts/renesas/r7s72100.dtsi +++ b/arch/arm/boot/dts/renesas/r7s72100.dtsi @@ -36,6 +36,13 @@ b_clk: b { clock-div = <3>; }; + bsc: bsc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x18000000>; + }; + cpus { #address-cells = <1>; #size-cells = <0>;
Add a minimal device node for the Bus State Controller (BSC) on the RZ/A1H SoC, to be extended by board DTS files for devices residing in the BSC external address space. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- arch/arm/boot/dts/renesas/r7s72100.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)