Message ID | e35aa188e5176544c6884f2d1d7aa1b242a51acf.1716965617.git.ysato@users.sourceforge.jp (mailing list archive) |
---|---|
State | Awaiting Upstream |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | Device Tree support for SH7751 based board | expand |
On Wed, May 29, 2024 at 05:01:05PM +0900, Yoshinori Sato wrote: > Renesas SH7751 external interrupt encoder json-schema. > > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> > --- > .../renesas,sh7751-irl-ext.yaml | 57 +++++++++++++++++++ > 1 file changed, 57 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml > new file mode 100644 > index 000000000000..ff70d57b86cd > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml > @@ -0,0 +1,57 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-irl-ext.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas SH7751 external interrupt encoder with enable regs. > + > +maintainers: > + - Yoshinori Sato <ysato@users.sourceforge.jp> > + > +description: > + This is the generally used external interrupt encoder on SH7751 based boards. > + > +properties: > + compatible: > + items: > + - const: renesas,sh7751-irl-ext > + > + reg: true Needs to define how many and what they are. > + > + interrupt-controller: true > + > + '#interrupt-cells': > + const: 2 > + > + '#address-cells': > + const: 0 > + > + renesas,set-to-disable: > + $ref: /schemas/types.yaml#/definitions/flag > + description: Invert enable registers. Setting the bit to 0 enables interrupts. > + > + renesas,enable-reg: > + $ref: /schemas/types.yaml#/definitions/uint32-array > + description: | Don't need '|'. > + IRQ enable register bit mapping This needs a better description and constraints? Number of entries in the array or values of the entries. > + > +required: > + - compatible > + - reg > + - interrupt-controller > + - '#interrupt-cells' > + - renesas,enable-reg > + > +additionalProperties: false > + > +examples: > + - | > + r2dintc: interrupt-controller@a4000000 { > + compatible = "renesas,sh7751-irl-ext"; > + reg = <0xa4000000 0x02>; > + interrupt-controller; > + #address-cells = <0>; > + #interrupt-cells = <2>; > + renesas,enable-reg = <12 9 10 3 0 4 1 2 8 5 6 7 15 15 15 11>; > + }; > -- > 2.39.2 >
diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml new file mode 100644 index 000000000000..ff70d57b86cd --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-irl-ext.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SH7751 external interrupt encoder with enable regs. + +maintainers: + - Yoshinori Sato <ysato@users.sourceforge.jp> + +description: + This is the generally used external interrupt encoder on SH7751 based boards. + +properties: + compatible: + items: + - const: renesas,sh7751-irl-ext + + reg: true + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + '#address-cells': + const: 0 + + renesas,set-to-disable: + $ref: /schemas/types.yaml#/definitions/flag + description: Invert enable registers. Setting the bit to 0 enables interrupts. + + renesas,enable-reg: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + IRQ enable register bit mapping + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - renesas,enable-reg + +additionalProperties: false + +examples: + - | + r2dintc: interrupt-controller@a4000000 { + compatible = "renesas,sh7751-irl-ext"; + reg = <0xa4000000 0x02>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + renesas,enable-reg = <12 9 10 3 0 4 1 2 8 5 6 7 15 15 15 11>; + };
Renesas SH7751 external interrupt encoder json-schema. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> --- .../renesas,sh7751-irl-ext.yaml | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml