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[73.95.159.87]) by smtp.gmail.com with ESMTPSA id v134sm1998052ita.16.2019.04.30.13.51.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 30 Apr 2019 13:51:29 -0700 (PDT) From: Paul Walmsley To: sboyd@kernel.org, mturquette@baylibre.com Subject: [PATCH v4 0/2] clk: add driver for the SiFive FU540 PRCI and PLLs it controls Date: Tue, 30 Apr 2019 13:50:55 -0700 Message-Id: <20190430205055.25673-1-paul.walmsley@sifive.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190430_135132_508430_B1BFC970 X-CRM114-Status: GOOD ( 10.60 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-riscv@lists.infradead.org, Paul Walmsley , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP clk: add driver for the SiFive FU540 PRCI and PLLs it controls Add a driver for the SiFive FU540 PRCI IP block, which handles clock and some device reset control for the SiFive FU540 chip. Also add a driver- independent library for the Analog Bits Wide-Range PLL (WRPLL), used by the PRCI driver to monitor and control the WRPLL instances on the FU540 chip. This fourth version incorporates changes requested by Stephen Boyd . The DT bindings patch has been dropped since Stephen has already queued it. This patch series is also available, with the binding documentation patch, at: https://github.com/sifive/riscv-linux/tree/dev/paulw/prci-v5.1-rc7 Boot-tested on a SiFive HiFive Unleashed board, using BBL and the open-source FSBL with a mainline-focused DTB, using the following composite test branch: https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.1-rc7-experimental - Paul Paul Walmsley (2): clk: analogbits: add Wide-Range PLL library clk: sifive: add a driver for the SiFive FU540 PRCI IP block MAINTAINERS | 6 + drivers/clk/Kconfig | 3 + drivers/clk/Makefile | 2 + drivers/clk/analogbits/Kconfig | 2 + drivers/clk/analogbits/Makefile | 3 + drivers/clk/analogbits/wrpll-cln28hpc.c | 364 ++++++++++ drivers/clk/sifive/Kconfig | 18 + drivers/clk/sifive/Makefile | 1 + drivers/clk/sifive/fu540-prci.c | 630 ++++++++++++++++++ include/linux/clk/analogbits-wrpll-cln28hpc.h | 79 +++ 10 files changed, 1108 insertions(+) create mode 100644 drivers/clk/analogbits/Kconfig create mode 100644 drivers/clk/analogbits/Makefile create mode 100644 drivers/clk/analogbits/wrpll-cln28hpc.c create mode 100644 drivers/clk/sifive/Kconfig create mode 100644 drivers/clk/sifive/Makefile create mode 100644 drivers/clk/sifive/fu540-prci.c create mode 100644 include/linux/clk/analogbits-wrpll-cln28hpc.h