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[114.34.229.221]) by smtp.gmail.com with ESMTPSA id 143sm1726505pfx.144.2021.03.31.02.26.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 31 Mar 2021 02:26:15 -0700 (PDT) From: Greentime Hu To: greentime.hu@sifive.com, paul.walmsley@sifive.com, hes@sifive.com, erik.danie@sifive.com, zong.li@sifive.com, bhelgaas@google.com, robh+dt@kernel.org, aou@eecs.berkeley.edu, mturquette@baylibre.com, sboyd@kernel.org, lorenzo.pieralisi@arm.com, p.zabel@pengutronix.de, alex.dewar90@gmail.com, khilman@baylibre.com, hayashi.kunihiko@socionext.com, vidyas@nvidia.com, jh80.chung@samsung.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, helgaas@kernel.org Subject: [PATCH v3 0/6] Add SiFive FU740 PCIe host controller driver support Date: Wed, 31 Mar 2021 17:25:59 +0800 Message-Id: <20210331092605.105909-1-greentime.hu@sifive.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210331_102619_534018_8783E4FF X-CRM114-Status: GOOD ( 12.45 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This patchset includes SiFive FU740 PCIe host controller driver. We also add pcie_aux clock and pcie_power_on_reset controller to prci driver for PCIe driver to use it. This is tested with e1000e: Intel(R) PRO/1000 Network Card, AMD Radeon R5 230 graphics card and SP M.2 PCIe Gen 3 SSD in SiFive Unmatched based on v5.11 Linux kernel. Changes in v3: - Remove items that has been defined - Refine format of sifive,fu740-pcie.yaml - Replace perstn-gpios with the common one - Change DBI mapping space to 2GB from 4GB - Refine drivers/reset/Kconfig Changes in v2: - Refine codes based on reviewers' feedback - Remove define and use the common one - Replace __raw_writel with writel_relaxed - Split fu740_phyregreadwrite to write function - Use readl_poll_timeout in stead of while loop checking - Use dwc common codes - Use gpio descriptors and the gpiod_* api. - Replace devm_ioremap_resource with devm_platform_ioremap_resource_byname - Replace devm_reset_control_get with devm_reset_control_get_exclusive - Add more comments for delay and sleep - Remove "phy ? x : y" expressions - Refine code logic to remove possible infinite loop - Replace magic number with meaningful define - Remove fu740_pcie_pm_ops - Use builtin_platform_driver Greentime Hu (5): clk: sifive: Add pcie_aux clock in prci driver for PCIe driver clk: sifive: Use reset-simple in prci driver for PCIe driver MAINTAINERS: Add maintainers for SiFive FU740 PCIe driver dt-bindings: PCI: Add SiFive FU740 PCIe host controller riscv: dts: Add PCIe support for the SiFive FU740-C000 SoC Paul Walmsley (1): PCI: fu740: Add SiFive FU740 PCIe host controller driver .../bindings/pci/sifive,fu740-pcie.yaml | 109 ++++++ MAINTAINERS | 8 + arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 33 ++ drivers/clk/sifive/Kconfig | 2 + drivers/clk/sifive/fu740-prci.c | 11 + drivers/clk/sifive/fu740-prci.h | 2 +- drivers/clk/sifive/sifive-prci.c | 54 +++ drivers/clk/sifive/sifive-prci.h | 13 + drivers/pci/controller/dwc/Kconfig | 9 + drivers/pci/controller/dwc/Makefile | 1 + drivers/pci/controller/dwc/pcie-fu740.c | 324 ++++++++++++++++++ drivers/reset/Kconfig | 1 + include/dt-bindings/clock/sifive-fu740-prci.h | 1 + 13 files changed, 567 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml create mode 100644 drivers/pci/controller/dwc/pcie-fu740.c