mbox series

[RFC,0/2] Add PLIC support for Renesas RZ/Five SoC

Message ID 20220524172214.5104-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive)
Headers show
Series Add PLIC support for Renesas RZ/Five SoC | expand

Message

Prabhakar May 24, 2022, 5:22 p.m. UTC 
Hi All,

This patch series adds PLIC support for Renesas RZ/Five SoC.

Sending this as an RFC based on the discussion [0].

This patches have been tested with I2C and DMAC interface as these
blocks have edge interrupts.

[0] https://lore.kernel.org/linux-arm-kernel/87o80a7t2z.wl-maz@kernel.org/T/

Cheers,
Prabhakar

Lad Prabhakar (2):
  dt-bindings: interrupt-controller: sifive,plic: Document Renesas
    RZ/Five SoC
  irqchip/sifive-plic: Add support for Renesas RZ/Five SoC

 .../sifive,plic-1.0.0.yaml                    | 38 +++++++++-
 drivers/irqchip/Kconfig                       |  1 +
 drivers/irqchip/irq-sifive-plic.c             | 71 ++++++++++++++++++-
 3 files changed, 105 insertions(+), 5 deletions(-)