mbox series

[-next,v2,0/2] riscv: some refactorings realted to uaccess and extable

Message ID 20220815032025.2685516-1-tongtiangen@huawei.com (mailing list archive)
Headers show
Series riscv: some refactorings realted to uaccess and extable | expand

Message

Tong Tiangen Aug. 15, 2022, 3:20 a.m. UTC
This patchset do some refactorings related to riscv's uaccess and extable,
mainly for the usage of __get/put_user_nocheck() which not distinguish user
access and kernel access.

v1 -> v2: 
  According to Conor's suggestion, split into two logically independent
  patches.

Tong Tiangen (2):
  riscv: uaccess: rename __get/put_user_nocheck to __get/put_mem_nocheck
  riscv: extable: add new extable type EX_TYPE_KACCESS_ERR_ZERO support

 arch/riscv/include/asm/asm-extable.h |  12 ++
 arch/riscv/include/asm/uaccess.h     | 162 +++++++++++++--------------
 arch/riscv/mm/extable.c              |   1 +
 3 files changed, 94 insertions(+), 81 deletions(-)

Comments

Tong Tiangen Aug. 24, 2022, 6:31 a.m. UTC | #1
Hi riscv maintainers, kindly ping...

Thanks,
Tong.

在 2022/8/15 11:20, Tong Tiangen 写道:
> This patchset do some refactorings related to riscv's uaccess and extable,
> mainly for the usage of __get/put_user_nocheck() which not distinguish user
> access and kernel access.
> 
> v1 -> v2:
>    According to Conor's suggestion, split into two logically independent
>    patches.
> 
> Tong Tiangen (2):
>    riscv: uaccess: rename __get/put_user_nocheck to __get/put_mem_nocheck
>    riscv: extable: add new extable type EX_TYPE_KACCESS_ERR_ZERO support
> 
>   arch/riscv/include/asm/asm-extable.h |  12 ++
>   arch/riscv/include/asm/uaccess.h     | 162 +++++++++++++--------------
>   arch/riscv/mm/extable.c              |   1 +
>   3 files changed, 94 insertions(+), 81 deletions(-)
>
Conor Dooley Aug. 24, 2022, 4:49 p.m. UTC | #2
On 24/08/2022 07:31, Tong Tiangen wrote:
> Hi riscv maintainers, kindly ping...
> 
> Thanks,
> Tong.
> 
> 在 2022/8/15 11:20, Tong Tiangen 写道:

It's barely been more than a week, relax :)

checkpatch really does not like one of the macros you added. Please
consider whether this is valid:

ERROR: Macros with complex values should be enclosed in parentheses
#38: FILE: arch/riscv/include/asm/asm-extable.h:61:
+#define _ASM_EXTABLE_KACCESS_ERR_ZERO(insn, fixup, err, zero)          \
+       __DEFINE_ASM_GPR_NUMS                                           \
+       __ASM_EXTABLE_RAW(#insn, #fixup,                                \
+                         __stringify(EX_TYPE_KACCESS_ERR_ZERO),        \
+                         "("                                           \
+                           EX_DATA_REG(ERR, err) " | "                 \
+                           EX_DATA_REG(ZERO, zero)                     \
+                         ")")

Thanks,
Conor.

>> This patchset do some refactorings related to riscv's uaccess and extable,
>> mainly for the usage of __get/put_user_nocheck() which not distinguish user
>> access and kernel access.
>>
>> v1 -> v2:
>>    According to Conor's suggestion, split into two logically independent
>>    patches.
>>
>> Tong Tiangen (2):
>>    riscv: uaccess: rename __get/put_user_nocheck to __get/put_mem_nocheck
>>    riscv: extable: add new extable type EX_TYPE_KACCESS_ERR_ZERO support
>>
>>   arch/riscv/include/asm/asm-extable.h |  12 ++
>>   arch/riscv/include/asm/uaccess.h     | 162 +++++++++++++--------------
>>   arch/riscv/mm/extable.c              |   1 +
>>   3 files changed, 94 insertions(+), 81 deletions(-)
>>
Tong Tiangen Aug. 25, 2022, 3:04 a.m. UTC | #3
在 2022/8/25 0:49, Conor.Dooley@microchip.com 写道:
> On 24/08/2022 07:31, Tong Tiangen wrote:
>> Hi riscv maintainers, kindly ping...
>>
>> Thanks,
>> Tong.
>>
>> 在 2022/8/15 11:20, Tong Tiangen 写道:
> 
> It's barely been more than a week, relax :)
> 
> checkpatch really does not like one of the macros you added. Please
> consider whether this is valid:
> 
> ERROR: Macros with complex values should be enclosed in parentheses
> #38: FILE: arch/riscv/include/asm/asm-extable.h:61:
> +#define _ASM_EXTABLE_KACCESS_ERR_ZERO(insn, fixup, err, zero)          \
> +       __DEFINE_ASM_GPR_NUMS                                           \
> +       __ASM_EXTABLE_RAW(#insn, #fixup,                                \
> +                         __stringify(EX_TYPE_KACCESS_ERR_ZERO),        \
> +                         "("                                           \
> +                           EX_DATA_REG(ERR, err) " | "                 \
> +                           EX_DATA_REG(ZERO, zero)                     \
> +                         ")")
> 
> Thanks,
> Conor.


Judging from the use context of this macro, there is no problem with the 
definition of this macro.

In addition, I refer to the definition of macro 
_ASM_EXTABLE_UACCESS_ERR_ZERO for the style of this macro. The 
difference is that the types used in the macro are different.

:)

Thanks,
Tong.

> 
>>> This patchset do some refactorings related to riscv's uaccess and extable,
>>> mainly for the usage of __get/put_user_nocheck() which not distinguish user
>>> access and kernel access.
>>>
>>> v1 -> v2:
>>>     According to Conor's suggestion, split into two logically independent
>>>     patches.
>>>
>>> Tong Tiangen (2):
>>>     riscv: uaccess: rename __get/put_user_nocheck to __get/put_mem_nocheck
>>>     riscv: extable: add new extable type EX_TYPE_KACCESS_ERR_ZERO support
>>>
>>>    arch/riscv/include/asm/asm-extable.h |  12 ++
>>>    arch/riscv/include/asm/uaccess.h     | 162 +++++++++++++--------------
>>>    arch/riscv/mm/extable.c              |   1 +
>>>    3 files changed, 94 insertions(+), 81 deletions(-)
>>>