Message ID | 20220829125226.511564-1-apatel@ventanamicro.com (mailing list archive) |
---|---|
Headers | show |
Series | Add PMEM support for RISC-V | expand |
On 29/08/2022 13:52, Anup Patel wrote: > The Linux NVDIMM PEM drivers require arch support to map and access the > persistent memory device. This series adds RISC-V PMEM support using > recently added Svpbmt and Zicbom support. > > These patches can also be found in riscv_pmem_v1 branch at: > https://github.com/avpatel/linux.git Hey Anup, couple build errors here: /stuff/linux/arch/riscv/mm/cacheflush.c:99:2: error: call to undeclared function 'for_each_of_cpu_node'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] for_each_of_cpu_node(node) { ^ /stuff/linux/arch/riscv/mm/cacheflush.c:99:28: error: expected ';' after expression for_each_of_cpu_node(node) { ^ ; 1 warning generated. /stuff/linux/arch/riscv/mm/cacheflush.c:105:4: error: 'continue' statement not in loop statement continue; ^ /stuff/linux/arch/riscv/mm/cacheflush.c:108:4: error: 'continue' statement not in loop statement continue; ^ /stuff/linux/arch/riscv/mm/cacheflush.c:111:9: error: call to undeclared function 'of_property_read_u32'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] ret = of_property_read_u32(node, "riscv,cbom-block-size", &val); ^ /stuff/linux/arch/riscv/mm/cacheflush.c:113:4: error: 'continue' statement not in loop statement continue; ^ 6 errors generated. LKP already complained about this prior to you posting & as it has all the repro needed, there's not much point in me sharing my config etc: https://lore.kernel.org/all/202208272028.IwrNZ0Ur-lkp@intel.com/ Thanks, Conor. PS: I liked the last patch, must've been a hard config option to find if it took two of you! ;) > > Anup Patel (4): > RISC-V: Fix ioremap_cache() and ioremap_wc() for systems with Svpbmt > RISC-V: Move riscv_init_cbom_blocksize() to cacheflush.c > RISC-V: Implement arch specific PMEM APIs > RISC-V: Enable PMEM drivers > > arch/riscv/Kconfig | 1 + > arch/riscv/configs/defconfig | 1 + > arch/riscv/include/asm/cacheflush.h | 2 ++ > arch/riscv/include/asm/io.h | 10 ++++++++ > arch/riscv/include/asm/pgtable.h | 2 ++ > arch/riscv/mm/Makefile | 1 + > arch/riscv/mm/cacheflush.c | 37 +++++++++++++++++++++++++++++ > arch/riscv/mm/dma-noncoherent.c | 36 ---------------------------- > arch/riscv/mm/pmem.c | 21 ++++++++++++++++ > 9 files changed, 75 insertions(+), 36 deletions(-) > create mode 100644 arch/riscv/mm/pmem.c >
On Mon, Aug 29, 2022 at 11:11 PM <Conor.Dooley@microchip.com> wrote: > > On 29/08/2022 13:52, Anup Patel wrote: > > The Linux NVDIMM PEM drivers require arch support to map and access the > > persistent memory device. This series adds RISC-V PMEM support using > > recently added Svpbmt and Zicbom support. > > > > These patches can also be found in riscv_pmem_v1 branch at: > > https://github.com/avpatel/linux.git > > Hey Anup, couple build errors here: > > /stuff/linux/arch/riscv/mm/cacheflush.c:99:2: error: call to undeclared function 'for_each_of_cpu_node'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] > for_each_of_cpu_node(node) { > ^ > /stuff/linux/arch/riscv/mm/cacheflush.c:99:28: error: expected ';' after expression > for_each_of_cpu_node(node) { > ^ > ; > 1 warning generated. > /stuff/linux/arch/riscv/mm/cacheflush.c:105:4: error: 'continue' statement not in loop statement > continue; > ^ > /stuff/linux/arch/riscv/mm/cacheflush.c:108:4: error: 'continue' statement not in loop statement > continue; > ^ > /stuff/linux/arch/riscv/mm/cacheflush.c:111:9: error: call to undeclared function 'of_property_read_u32'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] > ret = of_property_read_u32(node, "riscv,cbom-block-size", &val); > ^ > /stuff/linux/arch/riscv/mm/cacheflush.c:113:4: error: 'continue' statement not in loop statement > continue; > ^ > 6 errors generated. > > LKP already complained about this prior to you posting & as it has > all the repro needed, there's not much point in me sharing my config > etc: > https://lore.kernel.org/all/202208272028.IwrNZ0Ur-lkp@intel.com/ Strange, I never got this email. I will send v2 to fix this. Regards, Anup > > Thanks, > Conor. > > PS: I liked the last patch, must've been a hard config option to > find if it took two of you! ;) > > > > > > Anup Patel (4): > > RISC-V: Fix ioremap_cache() and ioremap_wc() for systems with Svpbmt > > RISC-V: Move riscv_init_cbom_blocksize() to cacheflush.c > > RISC-V: Implement arch specific PMEM APIs > > RISC-V: Enable PMEM drivers > > > > arch/riscv/Kconfig | 1 + > > arch/riscv/configs/defconfig | 1 + > > arch/riscv/include/asm/cacheflush.h | 2 ++ > > arch/riscv/include/asm/io.h | 10 ++++++++ > > arch/riscv/include/asm/pgtable.h | 2 ++ > > arch/riscv/mm/Makefile | 1 + > > arch/riscv/mm/cacheflush.c | 37 +++++++++++++++++++++++++++++ > > arch/riscv/mm/dma-noncoherent.c | 36 ---------------------------- > > arch/riscv/mm/pmem.c | 21 ++++++++++++++++ > > 9 files changed, 75 insertions(+), 36 deletions(-) > > create mode 100644 arch/riscv/mm/pmem.c > >
On 30/08/2022 05:43, Anup Patel wrote: > On Mon, Aug 29, 2022 at 11:11 PM <Conor.Dooley@microchip.com> wrote: >> LKP already complained about this prior to you posting & as it has >> all the repro needed, there's not much point in me sharing my config >> etc: >> https://lore.kernel.org/all/202208272028.IwrNZ0Ur-lkp@intel.com/ > > Strange, I never got this email. Good ole corporate firewall maybe..