| Message ID | 20230301082552.274331-1-alexghiti@rivosinc.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | riscv: Use PUD/P4D/PGD pages for the linear mapping | expand |
On Wed, Mar 1, 2023 at 1:56 PM Alexandre Ghiti <alexghiti@rivosinc.com> wrote: > > This patchset intends to improve tlb utilization by using hugepages for > the linear mapping. > > base-commit-tag: v6.2-rc7 > > v6: > - quiet LLVM warning by casting phys_ram_base into an unsigned long > > v5: > - Fix nommu builds by getting rid of riscv_pfn_base in patch 1, thanks > Conor > - Add RB from Andrew > > v4: > - Rebase on top of v6.2-rc3, as noted by Conor > - Add Acked-by Rob > > v3: > - Change the comment about initrd_start VA conversion so that it fits > ARM64 and RISCV64 (and others in the future if needed), as suggested > by Rob > > v2: > - Add a comment on why RISCV64 does not need to set initrd_start/end that > early in the boot process, as asked by Rob > > Alexandre Ghiti (2): > riscv: Get rid of riscv_pfn_base variable > riscv: Use PUD/P4D/PGD pages for the linear mapping I tried this series but it is getting stuck after reaching user space. Does this series require some other dependent patches ? Regards, Anup > > arch/riscv/include/asm/page.h | 19 +++++++++++++++++-- > arch/riscv/mm/init.c | 28 ++++++++++++++++++---------- > arch/riscv/mm/physaddr.c | 16 ++++++++++++++++ > drivers/of/fdt.c | 11 ++++++----- > 4 files changed, 57 insertions(+), 17 deletions(-) > > -- > 2.37.2 >
Hi Anup, On Mon, Mar 6, 2023 at 5:33 PM Anup Patel <apatel@ventanamicro.com> wrote: > > On Wed, Mar 1, 2023 at 1:56 PM Alexandre Ghiti <alexghiti@rivosinc.com> wrote: > > > > This patchset intends to improve tlb utilization by using hugepages for > > the linear mapping. > > > > base-commit-tag: v6.2-rc7 > > > > v6: > > - quiet LLVM warning by casting phys_ram_base into an unsigned long > > > > v5: > > - Fix nommu builds by getting rid of riscv_pfn_base in patch 1, thanks > > Conor > > - Add RB from Andrew > > > > v4: > > - Rebase on top of v6.2-rc3, as noted by Conor > > - Add Acked-by Rob > > > > v3: > > - Change the comment about initrd_start VA conversion so that it fits > > ARM64 and RISCV64 (and others in the future if needed), as suggested > > by Rob > > > > v2: > > - Add a comment on why RISCV64 does not need to set initrd_start/end that > > early in the boot process, as asked by Rob > > > > Alexandre Ghiti (2): > > riscv: Get rid of riscv_pfn_base variable > > riscv: Use PUD/P4D/PGD pages for the linear mapping > > I tried this series but it is getting stuck after reaching user space. > > Does this series require some other dependent patches ? No it should not. Let me take a look: what's your config and the base commit? > > Regards, > Anup > > > > > arch/riscv/include/asm/page.h | 19 +++++++++++++++++-- > > arch/riscv/mm/init.c | 28 ++++++++++++++++++---------- > > arch/riscv/mm/physaddr.c | 16 ++++++++++++++++ > > drivers/of/fdt.c | 11 ++++++----- > > 4 files changed, 57 insertions(+), 17 deletions(-) > > > > -- > > 2.37.2 > >
Hi Alex, On Tue, Mar 7, 2023 at 12:22 AM Alexandre Ghiti <alexghiti@rivosinc.com> wrote: > > Hi Anup, > > On Mon, Mar 6, 2023 at 5:33 PM Anup Patel <apatel@ventanamicro.com> wrote: > > > > On Wed, Mar 1, 2023 at 1:56 PM Alexandre Ghiti <alexghiti@rivosinc.com> wrote: > > > > > > This patchset intends to improve tlb utilization by using hugepages for > > > the linear mapping. > > > > > > base-commit-tag: v6.2-rc7 > > > > > > v6: > > > - quiet LLVM warning by casting phys_ram_base into an unsigned long > > > > > > v5: > > > - Fix nommu builds by getting rid of riscv_pfn_base in patch 1, thanks > > > Conor > > > - Add RB from Andrew > > > > > > v4: > > > - Rebase on top of v6.2-rc3, as noted by Conor > > > - Add Acked-by Rob > > > > > > v3: > > > - Change the comment about initrd_start VA conversion so that it fits > > > ARM64 and RISCV64 (and others in the future if needed), as suggested > > > by Rob > > > > > > v2: > > > - Add a comment on why RISCV64 does not need to set initrd_start/end that > > > early in the boot process, as asked by Rob > > > > > > Alexandre Ghiti (2): > > > riscv: Get rid of riscv_pfn_base variable > > > riscv: Use PUD/P4D/PGD pages for the linear mapping > > > > I tried this series but it is getting stuck after reaching user space. > > > > Does this series require some other dependent patches ? > > No it should not. Let me take a look: what's your config and the base commit? Please try the alexghiti_test branch at: https://github.com/avpatel/linux.git Compile the kernel with defconfig and launch QEMU as follows: qemu-system-riscv64 -M virt -m 1G -nographic -bios opensbi/build/platform/generic/firmware/fw_jump.bin -kernel ./build-riscv64/arch/riscv/boot/Image -append "root=/dev/ram rw console=ttyS0 earlycon" -initrd ./rootfs_riscv64.img In the above command, rootfs_riscv64.img is a busybox based rootfs. Regards, Anup > > > > > Regards, > > Anup > > > > > > > > arch/riscv/include/asm/page.h | 19 +++++++++++++++++-- > > > arch/riscv/mm/init.c | 28 ++++++++++++++++++---------- > > > arch/riscv/mm/physaddr.c | 16 ++++++++++++++++ > > > drivers/of/fdt.c | 11 ++++++----- > > > 4 files changed, 57 insertions(+), 17 deletions(-) > > > > > > -- > > > 2.37.2 > > >
On Tue, Mar 7, 2023 at 2:19 PM Anup Patel <apatel@ventanamicro.com> wrote: > > Hi Alex, > > On Tue, Mar 7, 2023 at 12:22 AM Alexandre Ghiti <alexghiti@rivosinc.com> wrote: > > > > Hi Anup, > > > > On Mon, Mar 6, 2023 at 5:33 PM Anup Patel <apatel@ventanamicro.com> wrote: > > > > > > On Wed, Mar 1, 2023 at 1:56 PM Alexandre Ghiti <alexghiti@rivosinc.com> wrote: > > > > > > > > This patchset intends to improve tlb utilization by using hugepages for > > > > the linear mapping. > > > > > > > > base-commit-tag: v6.2-rc7 > > > > > > > > v6: > > > > - quiet LLVM warning by casting phys_ram_base into an unsigned long > > > > > > > > v5: > > > > - Fix nommu builds by getting rid of riscv_pfn_base in patch 1, thanks > > > > Conor > > > > - Add RB from Andrew > > > > > > > > v4: > > > > - Rebase on top of v6.2-rc3, as noted by Conor > > > > - Add Acked-by Rob > > > > > > > > v3: > > > > - Change the comment about initrd_start VA conversion so that it fits > > > > ARM64 and RISCV64 (and others in the future if needed), as suggested > > > > by Rob > > > > > > > > v2: > > > > - Add a comment on why RISCV64 does not need to set initrd_start/end that > > > > early in the boot process, as asked by Rob > > > > > > > > Alexandre Ghiti (2): > > > > riscv: Get rid of riscv_pfn_base variable > > > > riscv: Use PUD/P4D/PGD pages for the linear mapping > > > > > > I tried this series but it is getting stuck after reaching user space. > > > > > > Does this series require some other dependent patches ? > > > > No it should not. Let me take a look: what's your config and the base commit? > > Please try the alexghiti_test branch at: > https://github.com/avpatel/linux.git > > Compile the kernel with defconfig and launch QEMU as follows: > qemu-system-riscv64 -M virt -m 1G -nographic -bios > opensbi/build/platform/generic/firmware/fw_jump.bin -kernel > ./build-riscv64/arch/riscv/boot/Image -append "root=/dev/ram rw > console=ttyS0 earlycon" -initrd ./rootfs_riscv64.img > > In the above command, rootfs_riscv64.img is a busybox based rootfs. Ok I can reproduce the problem. I'll debug that a bit further but increasing memory allows booting to userspace. > > Regards, > Anup > > > > > > > > > Regards, > > > Anup > > > > > > > > > > > arch/riscv/include/asm/page.h | 19 +++++++++++++++++-- > > > > arch/riscv/mm/init.c | 28 ++++++++++++++++++---------- > > > > arch/riscv/mm/physaddr.c | 16 ++++++++++++++++ > > > > drivers/of/fdt.c | 11 ++++++----- > > > > 4 files changed, 57 insertions(+), 17 deletions(-) > > > > > > > > -- > > > > 2.37.2 > > > >
On Tue, Mar 7, 2023 at 2:36 PM Alexandre Ghiti <alexghiti@rivosinc.com> wrote: > > On Tue, Mar 7, 2023 at 2:19 PM Anup Patel <apatel@ventanamicro.com> wrote: > > > > Hi Alex, > > > > On Tue, Mar 7, 2023 at 12:22 AM Alexandre Ghiti <alexghiti@rivosinc.com> wrote: > > > > > > Hi Anup, > > > > > > On Mon, Mar 6, 2023 at 5:33 PM Anup Patel <apatel@ventanamicro.com> wrote: > > > > > > > > On Wed, Mar 1, 2023 at 1:56 PM Alexandre Ghiti <alexghiti@rivosinc.com> wrote: > > > > > > > > > > This patchset intends to improve tlb utilization by using hugepages for > > > > > the linear mapping. > > > > > > > > > > base-commit-tag: v6.2-rc7 > > > > > > > > > > v6: > > > > > - quiet LLVM warning by casting phys_ram_base into an unsigned long > > > > > > > > > > v5: > > > > > - Fix nommu builds by getting rid of riscv_pfn_base in patch 1, thanks > > > > > Conor > > > > > - Add RB from Andrew > > > > > > > > > > v4: > > > > > - Rebase on top of v6.2-rc3, as noted by Conor > > > > > - Add Acked-by Rob > > > > > > > > > > v3: > > > > > - Change the comment about initrd_start VA conversion so that it fits > > > > > ARM64 and RISCV64 (and others in the future if needed), as suggested > > > > > by Rob > > > > > > > > > > v2: > > > > > - Add a comment on why RISCV64 does not need to set initrd_start/end that > > > > > early in the boot process, as asked by Rob > > > > > > > > > > Alexandre Ghiti (2): > > > > > riscv: Get rid of riscv_pfn_base variable > > > > > riscv: Use PUD/P4D/PGD pages for the linear mapping > > > > > > > > I tried this series but it is getting stuck after reaching user space. > > > > > > > > Does this series require some other dependent patches ? > > > > > > No it should not. Let me take a look: what's your config and the base commit? > > > > Please try the alexghiti_test branch at: > > https://github.com/avpatel/linux.git > > > > Compile the kernel with defconfig and launch QEMU as follows: > > qemu-system-riscv64 -M virt -m 1G -nographic -bios > > opensbi/build/platform/generic/firmware/fw_jump.bin -kernel > > ./build-riscv64/arch/riscv/boot/Image -append "root=/dev/ram rw > > console=ttyS0 earlycon" -initrd ./rootfs_riscv64.img > > > > In the above command, rootfs_riscv64.img is a busybox based rootfs. > > Ok I can reproduce the problem. I'll debug that a bit further but > increasing memory allows booting to userspace. > This is a real bug and that's because I should split the 1G page that contains the kernel text alias (and anything that we map with stricter rights) or something similar. I'll get back soon with a fix. Thanks Anup for the report, Alex > > > > Regards, > > Anup > > > > > > > > > > > > > Regards, > > > > Anup > > > > > > > > > > > > > > arch/riscv/include/asm/page.h | 19 +++++++++++++++++-- > > > > > arch/riscv/mm/init.c | 28 ++++++++++++++++++---------- > > > > > arch/riscv/mm/physaddr.c | 16 ++++++++++++++++ > > > > > drivers/of/fdt.c | 11 ++++++----- > > > > > 4 files changed, 57 insertions(+), 17 deletions(-) > > > > > > > > > > -- > > > > > 2.37.2 > > > > >