[V3,00/20] Add basic ACPI support for RISC-V

Message ID	20230303133647.845095-1-sunilvl@ventanamicro.com (mailing list archive)
Headers	show Return-Path: <linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org> From: Sunil V L <sunilvl@ventanamicro.com> To: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Subject: [PATCH V3 00/20] Add basic ACPI support for RISC-V Date: Fri, 3 Mar 2023 19:06:27 +0530 Message-Id: <20230303133647.845095-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: list Cc: Anup Patel <apatel@ventanamicro.com>, Jonathan Corbet <corbet@lwn.net>, Albert Ou <aou@eecs.berkeley.edu>, "Rafael J . Wysocki" <rafael@kernel.org>, Marc Zyngier <maz@kernel.org>, Daniel Lezcano <daniel.lezcano@linaro.org>, Atish Patra <atishp@rivosinc.com>, 'Conor Dooley ' <conor.dooley@microchip.com>, Palmer Dabbelt <palmer@dabbelt.com>, Thomas Gleixner <tglx@linutronix.de>, Andrew Jones <ajones@ventanamicro.com>, Len Brown <lenb@kernel.org> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org
Series	Add basic ACPI support for RISC-V \| expand [V3,00/20] Add basic ACPI support for RISC-V [V3,01/20] riscv: move sbi_init() earlier before jump_label_init() [V3,02/20] ACPICA: MADT: Add RISC-V INTC interrupt controller [V3,03/20] ACPICA: Add structure definitions for RISC-V RHCT [V3,04/20] ACPI: tables: Print RINTC information when MADT is parsed [V3,05/20] ACPI: OSL: Make should_use_kmap() 0 for RISC-V [V3,06/20] RISC-V: Add support to build the ACPI core [V3,07/20] ACPI: processor_core: RISC-V: Enable mapping processor to the hartid [V3,08/20] drivers/acpi: RISC-V: Add RHCT related code [V3,09/20] RISC-V: smpboot: Create wrapper smp_setup() [V3,10/20] RISC-V: smpboot: Add ACPI support in smp_setup() [V3,11/20] RISC-V: ACPI: Cache and retrieve the RINTC structure [V3,12/20] RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap() [V3,13/20] RISC-V: cpu: Enable cpuinfo for ACPI systems [V3,14/20] irqchip/riscv-intc: Add ACPI support [V3,15/20] clocksource/timer-riscv: Refactor riscv_timer_init_dt() [V3,16/20] clocksource/timer-riscv: Add ACPI support [V3,17/20] RISC-V: time.c: Add ACPI support for time_init() [V3,18/20] RISC-V: Add ACPI initialization in setup_arch() [V3,19/20] RISC-V: Enable ACPI in defconfig [V3,20/20] MAINTAINERS: Add entry for drivers/acpi/riscv

Sunil V L March 3, 2023, 1:36 p.m. UTC

This patch series enables the basic ACPI infrastructure for RISC-V.
Supporting external interrupt controllers is in progress and hence it is
tested using poll based HVC SBI console and RAM disk.

The first patch in this series is one of the patch from Jisheng's
series [1] which is not merged yet. This patch is required to support
ACPI since efi_init() which gets called before sbi_init() can enable
static branches and hits a panic.

Patch 2 and 3 are ACPICA patches which are not merged into acpica yet
but a PR is raised already.

Below are two ECRs approved by ASWG.
RINTC - https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
RHCT - https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view

The series depends on Anup's IPI improvement series [2].

[1] https://lore.kernel.org/all/20220821140918.3613-1-jszhang@kernel.org/
[2] https://lore.kernel.org/lkml/20230103141221.772261-7-apatel@ventanamicro.com/T/

Changes since V2:
	1) Dropped ACPI_PROCESSOR patch.
	2) Added new patch to print debug info of RISC-V INTC in MADT
	3) Addressed other comments from Drew.
	4) Rebased and updated tags

Changes since V1:
	1) Dropped PCI changes and instead added dummy interfaces just to enable
	   building ACPI core when CONFIG_PCI is enabled. Actual PCI changes will
	   be added in future along with external interrupt controller support
	   in ACPI.
	2) Squashed couple of patches so that new code added gets built in each
	   commit.
	3) Fixed the missing wake_cpu code in timer refactor patch as pointed by
	   Conor
	4) Fixed an issue with SMP disabled.
	5) Addressed other comments from Conor.
	6) Updated documentation patch as per feedback from Sanjaya.
	7) Fixed W=1 and checkpatch --strict issues.
	8) Added ACK/RB tags

These changes are available at
https://github.com/vlsunil/linux/commits/acpi_b1_us_review_ipi17_V3

Testing:
1) Build Qemu with ACPI support using below branch
https://github.com/vlsunil/qemu/tree/acpi_b1_us_review_V5

2) Build EDK2 as per instructions in
https://github.com/vlsunil/riscv-uefi-edk2-docs/wiki/RISC-V-Qemu-Virt-support

3) Build Linux after enabling SBI HVC and SBI earlycon
CONFIG_RISCV_SBI_V01=y
CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
CONFIG_HVC_RISCV_SBI=y

4) Build buildroot.

Run with below command.
qemu-system-riscv64   -nographic \
-drive file=Build/RiscVVirtQemu/RELEASE_GCC5/FV/RISCV_VIRT.fd,if=pflash,format=raw,unit=1 \
-machine virt -smp 16 -m 2G \
-kernel arch/riscv/boot/Image \
-initrd buildroot/output/images/rootfs.cpio \
-append "root=/dev/ram ro console=hvc0 earlycon=sbi"


Jisheng Zhang (1):
  riscv: move sbi_init() earlier before jump_label_init()

Sunil V L (19):
  ACPICA: MADT: Add RISC-V INTC interrupt controller
  ACPICA: Add structure definitions for RISC-V RHCT
  ACPI: tables: Print RINTC information when MADT is parsed
  ACPI: OSL: Make should_use_kmap() 0 for RISC-V
  RISC-V: Add support to build the ACPI core
  ACPI: processor_core: RISC-V: Enable mapping processor to the hartid
  drivers/acpi: RISC-V: Add RHCT related code
  RISC-V: smpboot: Create wrapper smp_setup()
  RISC-V: smpboot: Add ACPI support in smp_setup()
  RISC-V: ACPI: Cache and retrieve the RINTC structure
  RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap()
  RISC-V: cpu: Enable cpuinfo for ACPI systems
  irqchip/riscv-intc: Add ACPI support
  clocksource/timer-riscv: Refactor riscv_timer_init_dt()
  clocksource/timer-riscv: Add ACPI support
  RISC-V: time.c: Add ACPI support for time_init()
  RISC-V: Add ACPI initialization in setup_arch()
  RISC-V: Enable ACPI in defconfig
  MAINTAINERS: Add entry for drivers/acpi/riscv

 .../admin-guide/kernel-parameters.txt         |   8 +-
 MAINTAINERS                                   |   8 +
 arch/riscv/Kconfig                            |   5 +
 arch/riscv/configs/defconfig                  |   1 +
 arch/riscv/include/asm/acenv.h                |  11 +
 arch/riscv/include/asm/acpi.h                 |  82 ++++++
 arch/riscv/include/asm/cpu.h                  |   8 +
 arch/riscv/kernel/Makefile                    |   2 +
 arch/riscv/kernel/acpi.c                      | 262 ++++++++++++++++++
 arch/riscv/kernel/cpu.c                       |  27 +-
 arch/riscv/kernel/cpufeature.c                |  41 ++-
 arch/riscv/kernel/setup.c                     |  27 +-
 arch/riscv/kernel/smpboot.c                   |  77 ++++-
 arch/riscv/kernel/time.c                      |  23 +-
 drivers/acpi/Makefile                         |   2 +
 drivers/acpi/osl.c                            |   2 +-
 drivers/acpi/processor_core.c                 |  29 ++
 drivers/acpi/riscv/Makefile                   |   2 +
 drivers/acpi/riscv/rhct.c                     |  82 ++++++
 drivers/acpi/tables.c                         |  10 +
 drivers/clocksource/timer-riscv.c             |  92 +++---
 drivers/irqchip/irq-riscv-intc.c              |  77 ++++-
 include/acpi/actbl2.h                         |  68 ++++-
 23 files changed, 854 insertions(+), 92 deletions(-)
 create mode 100644 arch/riscv/include/asm/acenv.h
 create mode 100644 arch/riscv/include/asm/acpi.h
 create mode 100644 arch/riscv/include/asm/cpu.h
 create mode 100644 arch/riscv/kernel/acpi.c
 create mode 100644 drivers/acpi/riscv/Makefile
 create mode 100644 drivers/acpi/riscv/rhct.c

Conor Dooley March 6, 2023, 9:51 p.m. UTC | #1

Hey Sunil,

On Fri, Mar 03, 2023 at 07:06:27PM +0530, Sunil V L wrote:
> This patch series enables the basic ACPI infrastructure for RISC-V.
> Supporting external interrupt controllers is in progress and hence it is
> tested using poll based HVC SBI console and RAM disk.
> 
> The first patch in this series is one of the patch from Jisheng's
> series [1] which is not merged yet. This patch is required to support
> ACPI since efi_init() which gets called before sbi_init() can enable
> static branches and hits a panic.
> 
> Patch 2 and 3 are ACPICA patches which are not merged into acpica yet
> but a PR is raised already.
> 
> Below are two ECRs approved by ASWG.
> RINTC - https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
> RHCT - https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view
> 
> The series depends on Anup's IPI improvement series [2].
> 
> [1] https://lore.kernel.org/all/20220821140918.3613-1-jszhang@kernel.org/
> [2] https://lore.kernel.org/lkml/20230103141221.772261-7-apatel@ventanamicro.com/T/

Building a clang-15 allmodconfig (I didn't try gcc) with this series, and
Anup's IPI bits, results in a broken build, due to failings in cmpxchg:

/stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
        while (unlikely((ret = cmpxchg(&c->value, old, new)) != old)) {
                               ^
/stuff/linux/include/linux/atomic/atomic-instrumented.h:1916:2: note: expanded from macro 'cmpxchg'
        arch_cmpxchg(__ai_ptr, __VA_ARGS__); \
        ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:344:23: note: expanded from macro 'arch_cmpxchg'
        (__typeof__(*(ptr))) __cmpxchg((ptr),                           \
                             ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:335:3: note: expanded from macro '__cmpxchg'
                BUILD_BUG();                                            \
                ^
note: (skipping 3 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/stuff/linux/include/linux/compiler_types.h:385:2: note: expanded from macro '_compiletime_assert'
        __compiletime_assert(condition, msg, prefix, suffix)
        ^
/stuff/linux/include/linux/compiler_types.h:378:4: note: expanded from macro '__compiletime_assert'
                        prefix ## suffix();                             \
                        ^
<scratch space>:69:1: note: expanded from here
__compiletime_assert_335
^
/stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
/stuff/linux/include/linux/atomic/atomic-instrumented.h:1916:2: note: expanded from macro 'cmpxchg'
        arch_cmpxchg(__ai_ptr, __VA_ARGS__); \
        ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:344:23: note: expanded from macro 'arch_cmpxchg'
        (__typeof__(*(ptr))) __cmpxchg((ptr),                           \
                             ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:335:3: note: expanded from macro '__cmpxchg'
                BUILD_BUG();                                            \
                ^
note: (skipping 3 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/stuff/linux/include/linux/compiler_types.h:385:2: note: expanded from macro '_compiletime_assert'
        __compiletime_assert(condition, msg, prefix, suffix)
        ^
/stuff/linux/include/linux/compiler_types.h:378:4: note: expanded from macro '__compiletime_assert'
                        prefix ## suffix();                             \
                        ^
<scratch space>:69:1: note: expanded from here
__compiletime_assert_335
^
/stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
/stuff/linux/include/linux/atomic/atomic-instrumented.h:1916:2: note: expanded from macro 'cmpxchg'
        arch_cmpxchg(__ai_ptr, __VA_ARGS__); \
        ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:344:23: note: expanded from macro 'arch_cmpxchg'
        (__typeof__(*(ptr))) __cmpxchg((ptr),                           \
                             ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:335:3: note: expanded from macro '__cmpxchg'
                BUILD_BUG();                                            \
                ^
note: (skipping 3 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/stuff/linux/include/linux/compiler_types.h:385:2: note: expanded from macro '_compiletime_assert'
        __compiletime_assert(condition, msg, prefix, suffix)
        ^
/stuff/linux/include/linux/compiler_types.h:378:4: note: expanded from macro '__compiletime_assert'
                        prefix ## suffix();                             \
                        ^
<scratch space>:69:1: note: expanded from here
__compiletime_assert_335
^
/stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
/stuff/linux/include/linux/atomic/atomic-instrumented.h:1916:2: note: expanded from macro 'cmpxchg'
        arch_cmpxchg(__ai_ptr, __VA_ARGS__); \
        ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:344:23: note: expanded from macro 'arch_cmpxchg'
        (__typeof__(*(ptr))) __cmpxchg((ptr),                           \
                             ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:335:3: note: expanded from macro '__cmpxchg'
                BUILD_BUG();                                            \
                ^
note: (skipping 3 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/stuff/linux/include/linux/compiler_types.h:385:2: note: expanded from macro '_compiletime_assert'
        __compiletime_assert(condition, msg, prefix, suffix)
        ^
/stuff/linux/include/linux/compiler_types.h:378:4: note: expanded from macro '__compiletime_assert'
                        prefix ## suffix();                             \
                        ^
<scratch space>:69:1: note: expanded from here
__compiletime_assert_335
^
/stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
/stuff/linux/include/linux/atomic/atomic-instrumented.h:1916:2: note: expanded from macro 'cmpxchg'
        arch_cmpxchg(__ai_ptr, __VA_ARGS__); \
        ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:344:23: note: expanded from macro 'arch_cmpxchg'
        (__typeof__(*(ptr))) __cmpxchg((ptr),                           \
                             ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:335:3: note: expanded from macro '__cmpxchg'
                BUILD_BUG();                                            \
                ^
note: (skipping 3 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/stuff/linux/include/linux/compiler_types.h:385:2: note: expanded from macro '_compiletime_assert'
        __compiletime_assert(condition, msg, prefix, suffix)
        ^
/stuff/linux/include/linux/compiler_types.h:378:4: note: expanded from macro '__compiletime_assert'
                        prefix ## suffix();                             \
                        ^
<scratch space>:69:1: note: expanded from here
__compiletime_assert_335
^
/stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
/stuff/linux/include/linux/atomic/atomic-instrumented.h:1916:2: note: expanded from macro 'cmpxchg'
        arch_cmpxchg(__ai_ptr, __VA_ARGS__); \
        ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:344:23: note: expanded from macro 'arch_cmpxchg'
        (__typeof__(*(ptr))) __cmpxchg((ptr),                           \
                             ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:335:3: note: expanded from macro '__cmpxchg'
                BUILD_BUG();                                            \
                ^
note: (skipping 3 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/stuff/linux/include/linux/compiler_types.h:385:2: note: expanded from macro '_compiletime_assert'
        __compiletime_assert(condition, msg, prefix, suffix)
        ^
/stuff/linux/include/linux/compiler_types.h:378:4: note: expanded from macro '__compiletime_assert'
                        prefix ## suffix();                             \
                        ^
<scratch space>:69:1: note: expanded from here
__compiletime_assert_335
^
/stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
/stuff/linux/include/linux/atomic/atomic-instrumented.h:1916:2: note: expanded from macro 'cmpxchg'
        arch_cmpxchg(__ai_ptr, __VA_ARGS__); \
        ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:344:23: note: expanded from macro 'arch_cmpxchg'
        (__typeof__(*(ptr))) __cmpxchg((ptr),                           \
                             ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:335:3: note: expanded from macro '__cmpxchg'
                BUILD_BUG();                                            \
                ^
note: (skipping 3 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/stuff/linux/include/linux/compiler_types.h:385:2: note: expanded from macro '_compiletime_assert'
        __compiletime_assert(condition, msg, prefix, suffix)
        ^
/stuff/linux/include/linux/compiler_types.h:378:4: note: expanded from macro '__compiletime_assert'
                        prefix ## suffix();                             \
                        ^
<scratch space>:69:1: note: expanded from here
__compiletime_assert_335
^
/stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
/stuff/linux/include/linux/atomic/atomic-instrumented.h:1916:2: note: expanded from macro 'cmpxchg'
        arch_cmpxchg(__ai_ptr, __VA_ARGS__); \
        ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:344:23: note: expanded from macro 'arch_cmpxchg'
        (__typeof__(*(ptr))) __cmpxchg((ptr),                           \
                             ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:335:3: note: expanded from macro '__cmpxchg'
                BUILD_BUG();                                            \
                ^
note: (skipping 3 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/stuff/linux/include/linux/compiler_types.h:385:2: note: expanded from macro '_compiletime_assert'
        __compiletime_assert(condition, msg, prefix, suffix)
        ^
/stuff/linux/include/linux/compiler_types.h:378:4: note: expanded from macro '__compiletime_assert'
                        prefix ## suffix();                             \
                        ^
<scratch space>:69:1: note: expanded from here
__compiletime_assert_335
^
/stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
/stuff/linux/include/linux/atomic/atomic-instrumented.h:1916:2: note: expanded from macro 'cmpxchg'
        arch_cmpxchg(__ai_ptr, __VA_ARGS__); \
        ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:344:23: note: expanded from macro 'arch_cmpxchg'
        (__typeof__(*(ptr))) __cmpxchg((ptr),                           \
                             ^
/stuff/linux/arch/riscv/include/asm/cmpxchg.h:335:3: note: expanded from macro '__cmpxchg'
                BUILD_BUG();                                            \
                ^
note: (skipping 3 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all)
/stuff/linux/include/linux/compiler_types.h:385:2: note: expanded from macro '_compiletime_assert'
        __compiletime_assert(condition, msg, prefix, suffix)
        ^
/stuff/linux/include/linux/compiler_types.h:378:4: note: expanded from macro '__compiletime_assert'
                        prefix ## suffix();                             \
                        ^
<scratch space>:69:1: note: expanded from here
__compiletime_assert_335
^
9 errors generated.

Sunil V L March 7, 2023, 5:06 a.m. UTC | #2

On Mon, Mar 06, 2023 at 09:51:09PM +0000, Conor Dooley wrote:
> Hey Sunil,
> 
> On Fri, Mar 03, 2023 at 07:06:27PM +0530, Sunil V L wrote:
> > This patch series enables the basic ACPI infrastructure for RISC-V.
> > Supporting external interrupt controllers is in progress and hence it is
> > tested using poll based HVC SBI console and RAM disk.
> > 
> > The first patch in this series is one of the patch from Jisheng's
> > series [1] which is not merged yet. This patch is required to support
> > ACPI since efi_init() which gets called before sbi_init() can enable
> > static branches and hits a panic.
> > 
> > Patch 2 and 3 are ACPICA patches which are not merged into acpica yet
> > but a PR is raised already.
> > 
> > Below are two ECRs approved by ASWG.
> > RINTC - https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
> > RHCT - https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view
> > 
> > The series depends on Anup's IPI improvement series [2].
> > 
> > [1] https://lore.kernel.org/all/20220821140918.3613-1-jszhang@kernel.org/
> > [2] https://lore.kernel.org/lkml/20230103141221.772261-7-apatel@ventanamicro.com/T/
> 
> Building a clang-15 allmodconfig (I didn't try gcc) with this series, and
> Anup's IPI bits, results in a broken build, due to failings in cmpxchg:
> 
> /stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
>         while (unlikely((ret = cmpxchg(&c->value, old, new)) != old)) {
>                                ^
Hi Conor,

I am able to build without any of these issues using clang-15. I am
wondering whether the base is proper. I had rebased on top of the master
and couple of patches from IPI series were already merged in the master.

Do you mind verifying with my branch
https://github.com/vlsunil/linux/commits/acpi_b1_us_review_ipi17_V3?

Or if you could provide me your branch details, I can look further.

Thanks!
Sunil

Conor Dooley March 7, 2023, 6:13 a.m. UTC | #3

On 7 March 2023 05:06:16 GMT, Sunil V L <sunilvl@ventanamicro.com> wrote:
>On Mon, Mar 06, 2023 at 09:51:09PM +0000, Conor Dooley wrote:
>> Hey Sunil,
>> 
>> On Fri, Mar 03, 2023 at 07:06:27PM +0530, Sunil V L wrote:
>> > This patch series enables the basic ACPI infrastructure for RISC-V.
>> > Supporting external interrupt controllers is in progress and hence it is
>> > tested using poll based HVC SBI console and RAM disk.
>> > 
>> > The first patch in this series is one of the patch from Jisheng's
>> > series [1] which is not merged yet. This patch is required to support
>> > ACPI since efi_init() which gets called before sbi_init() can enable
>> > static branches and hits a panic.
>> > 
>> > Patch 2 and 3 are ACPICA patches which are not merged into acpica yet
>> > but a PR is raised already.
>> > 
>> > Below are two ECRs approved by ASWG.
>> > RINTC - https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
>> > RHCT - https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view
>> > 
>> > The series depends on Anup's IPI improvement series [2].
>> > 
>> > [1] https://lore.kernel.org/all/20220821140918.3613-1-jszhang@kernel.org/
>> > [2] https://lore.kernel.org/lkml/20230103141221.772261-7-apatel@ventanamicro.com/T/
>> 
>> Building a clang-15 allmodconfig (I didn't try gcc) with this series, and
>> Anup's IPI bits, results in a broken build, due to failings in cmpxchg:
>> 
>> /stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
>>         while (unlikely((ret = cmpxchg(&c->value, old, new)) != old)) {
>>                                ^
>Hi Conor,
>
>I am able to build without any of these issues using clang-15. I am
>wondering whether the base is proper. I had rebased on top of the master
>and couple of patches from IPI series were already merged in the master.
>
>Do you mind verifying with my branch
>https://github.com/vlsunil/linux/commits/acpi_b1_us_review_ipi17_V3?

I can check that later I suppose.

>
>Or if you could provide me your branch details, I can look further.

6.3-rc1, with both series applied, sans Anups applied patches.

Conor Dooley March 7, 2023, 6:44 p.m. UTC | #4

On Tue, Mar 07, 2023 at 06:13:22AM +0000, Conor Dooley wrote:
> 
> 
> On 7 March 2023 05:06:16 GMT, Sunil V L <sunilvl@ventanamicro.com> wrote:
> >On Mon, Mar 06, 2023 at 09:51:09PM +0000, Conor Dooley wrote:
> >> Hey Sunil,
> >> 
> >> On Fri, Mar 03, 2023 at 07:06:27PM +0530, Sunil V L wrote:
> >> > This patch series enables the basic ACPI infrastructure for RISC-V.
> >> > Supporting external interrupt controllers is in progress and hence it is
> >> > tested using poll based HVC SBI console and RAM disk.
> >> > 
> >> > The first patch in this series is one of the patch from Jisheng's
> >> > series [1] which is not merged yet. This patch is required to support
> >> > ACPI since efi_init() which gets called before sbi_init() can enable
> >> > static branches and hits a panic.
> >> > 
> >> > Patch 2 and 3 are ACPICA patches which are not merged into acpica yet
> >> > but a PR is raised already.
> >> > 
> >> > Below are two ECRs approved by ASWG.
> >> > RINTC - https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
> >> > RHCT - https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view
> >> > 
> >> > The series depends on Anup's IPI improvement series [2].
> >> > 
> >> > [1] https://lore.kernel.org/all/20220821140918.3613-1-jszhang@kernel.org/
> >> > [2] https://lore.kernel.org/lkml/20230103141221.772261-7-apatel@ventanamicro.com/T/
> >> 
> >> Building a clang-15 allmodconfig (I didn't try gcc) with this series, and
> >> Anup's IPI bits, results in a broken build, due to failings in cmpxchg:
> >> 
> >> /stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
> >>         while (unlikely((ret = cmpxchg(&c->value, old, new)) != old)) {
> >>                                ^

> > I am able to build without any of these issues using clang-15. I am
> > wondering whether the base is proper. I had rebased on top of the master
> > and couple of patches from IPI series were already merged in the master.
> > 
> > Do you mind verifying with my branch
> > https://github.com/vlsunil/linux/commits/acpi_b1_us_review_ipi17_V3?
> 
> I can check that later I suppose.

That's broken too.

> > Or if you could provide me your branch details, I can look further.
> 
> 6.3-rc1, with both series applied, sans Anups applied patches.

I've pushed my stuff here, but unlikely that it makes any odds since
your branch experiences the same build issue.
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ borked-acpi-surface

My build commands are wrapped in a script, but it's an LLVM=1
allmodconfig run w/ clang-15(.0.7) etc.

Chees,
Conor.

Sunil V L March 8, 2023, 1:01 a.m. UTC | #5

On Tue, Mar 07, 2023 at 06:44:35PM +0000, Conor Dooley wrote:
> On Tue, Mar 07, 2023 at 06:13:22AM +0000, Conor Dooley wrote:
> > 
> > 
> > On 7 March 2023 05:06:16 GMT, Sunil V L <sunilvl@ventanamicro.com> wrote:
> > >On Mon, Mar 06, 2023 at 09:51:09PM +0000, Conor Dooley wrote:
> > >> Hey Sunil,
> > >> 
> > >> On Fri, Mar 03, 2023 at 07:06:27PM +0530, Sunil V L wrote:
> > >> > This patch series enables the basic ACPI infrastructure for RISC-V.
> > >> > Supporting external interrupt controllers is in progress and hence it is
> > >> > tested using poll based HVC SBI console and RAM disk.
> > >> > 
> > >> > The first patch in this series is one of the patch from Jisheng's
> > >> > series [1] which is not merged yet. This patch is required to support
> > >> > ACPI since efi_init() which gets called before sbi_init() can enable
> > >> > static branches and hits a panic.
> > >> > 
> > >> > Patch 2 and 3 are ACPICA patches which are not merged into acpica yet
> > >> > but a PR is raised already.
> > >> > 
> > >> > Below are two ECRs approved by ASWG.
> > >> > RINTC - https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
> > >> > RHCT - https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view
> > >> > 
> > >> > The series depends on Anup's IPI improvement series [2].
> > >> > 
> > >> > [1] https://lore.kernel.org/all/20220821140918.3613-1-jszhang@kernel.org/
> > >> > [2] https://lore.kernel.org/lkml/20230103141221.772261-7-apatel@ventanamicro.com/T/
> > >> 
> > >> Building a clang-15 allmodconfig (I didn't try gcc) with this series, and
> > >> Anup's IPI bits, results in a broken build, due to failings in cmpxchg:
> > >> 
> > >> /stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
> > >>         while (unlikely((ret = cmpxchg(&c->value, old, new)) != old)) {
> > >>                                ^
> 
> > > I am able to build without any of these issues using clang-15. I am
> > > wondering whether the base is proper. I had rebased on top of the master
> > > and couple of patches from IPI series were already merged in the master.
> > > 
> > > Do you mind verifying with my branch
> > > https://github.com/vlsunil/linux/commits/acpi_b1_us_review_ipi17_V3?
> > 
> > I can check that later I suppose.
> 
> That's broken too.
> 
> > > Or if you could provide me your branch details, I can look further.
> > 
> > 6.3-rc1, with both series applied, sans Anups applied patches.
> 
> I've pushed my stuff here, but unlikely that it makes any odds since
> your branch experiences the same build issue.
> https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ borked-acpi-surface
> 
> My build commands are wrapped in a script, but it's an LLVM=1
> allmodconfig run w/ clang-15(.0.7) etc.
> 
Ahh allmodconfig. Thank you very much!. I can reproduce the failure. Let
me look further and fix in next revision.

Thanks!
Sunil

Ley Foon Tan April 4, 2023, 6:35 a.m. UTC | #6

On Wed, Mar 8, 2023 at 9:08 AM Sunil V L <sunilvl@ventanamicro.com> wrote:
>
> On Tue, Mar 07, 2023 at 06:44:35PM +0000, Conor Dooley wrote:
> > On Tue, Mar 07, 2023 at 06:13:22AM +0000, Conor Dooley wrote:
> > >
> > >
> > > On 7 March 2023 05:06:16 GMT, Sunil V L <sunilvl@ventanamicro.com> wrote:
> > > >On Mon, Mar 06, 2023 at 09:51:09PM +0000, Conor Dooley wrote:
> > > >> Hey Sunil,
> > > >>
> > > >> On Fri, Mar 03, 2023 at 07:06:27PM +0530, Sunil V L wrote:
> > > >> > This patch series enables the basic ACPI infrastructure for RISC-V.
> > > >> > Supporting external interrupt controllers is in progress and hence it is
> > > >> > tested using poll based HVC SBI console and RAM disk.
> > > >> >
> > > >> > The first patch in this series is one of the patch from Jisheng's
> > > >> > series [1] which is not merged yet. This patch is required to support
> > > >> > ACPI since efi_init() which gets called before sbi_init() can enable
> > > >> > static branches and hits a panic.
> > > >> >
> > > >> > Patch 2 and 3 are ACPICA patches which are not merged into acpica yet
> > > >> > but a PR is raised already.
> > > >> >
> > > >> > Below are two ECRs approved by ASWG.
> > > >> > RINTC - https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
> > > >> > RHCT - https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view
> > > >> >
> > > >> > The series depends on Anup's IPI improvement series [2].
> > > >> >
> > > >> > [1] https://lore.kernel.org/all/20220821140918.3613-1-jszhang@kernel.org/
> > > >> > [2] https://lore.kernel.org/lkml/20230103141221.772261-7-apatel@ventanamicro.com/T/
> > > >>
> > > >> Building a clang-15 allmodconfig (I didn't try gcc) with this series, and
> > > >> Anup's IPI bits, results in a broken build, due to failings in cmpxchg:
> > > >>
> > > >> /stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
> > > >>         while (unlikely((ret = cmpxchg(&c->value, old, new)) != old)) {
> > > >>                                ^
> >
> > > > I am able to build without any of these issues using clang-15. I am
> > > > wondering whether the base is proper. I had rebased on top of the master
> > > > and couple of patches from IPI series were already merged in the master.
> > > >
> > > > Do you mind verifying with my branch
> > > > https://github.com/vlsunil/linux/commits/acpi_b1_us_review_ipi17_V3?
> > >
> > > I can check that later I suppose.
> >
> > That's broken too.
> >
> > > > Or if you could provide me your branch details, I can look further.
> > >
> > > 6.3-rc1, with both series applied, sans Anups applied patches.
> >
> > I've pushed my stuff here, but unlikely that it makes any odds since
> > your branch experiences the same build issue.
> > https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ borked-acpi-surface
> >
> > My build commands are wrapped in a script, but it's an LLVM=1
> > allmodconfig run w/ clang-15(.0.7) etc.
> >
> Ahh allmodconfig. Thank you very much!. I can reproduce the failure. Let
> me look further and fix in next revision.
>
> Thanks!
> Sunil

Hi Sunil

One question regarding PMU in ACPI flow.

We use DT to decode the supported HPM counters/events for the
different platforms now.
How do we enable PMU (drivers/perf/riscv_pmu_sbi.c) when using ACPI method?
Note, this might be in separate patch series.

Regards
Ley Foon

Sunil V L April 4, 2023, 6:54 a.m. UTC | #7

On Tue, Apr 04, 2023 at 02:35:19PM +0800, Ley Foon Tan wrote:
> On Wed, Mar 8, 2023 at 9:08 AM Sunil V L <sunilvl@ventanamicro.com> wrote:
> >
> > On Tue, Mar 07, 2023 at 06:44:35PM +0000, Conor Dooley wrote:
> > > On Tue, Mar 07, 2023 at 06:13:22AM +0000, Conor Dooley wrote:
> > > >
> > > >
> > > > On 7 March 2023 05:06:16 GMT, Sunil V L <sunilvl@ventanamicro.com> wrote:
> > > > >On Mon, Mar 06, 2023 at 09:51:09PM +0000, Conor Dooley wrote:
> > > > >> Hey Sunil,
> > > > >>
> > > > >> On Fri, Mar 03, 2023 at 07:06:27PM +0530, Sunil V L wrote:
> > > > >> > This patch series enables the basic ACPI infrastructure for RISC-V.
> > > > >> > Supporting external interrupt controllers is in progress and hence it is
> > > > >> > tested using poll based HVC SBI console and RAM disk.
> > > > >> >
> > > > >> > The first patch in this series is one of the patch from Jisheng's
> > > > >> > series [1] which is not merged yet. This patch is required to support
> > > > >> > ACPI since efi_init() which gets called before sbi_init() can enable
> > > > >> > static branches and hits a panic.
> > > > >> >
> > > > >> > Patch 2 and 3 are ACPICA patches which are not merged into acpica yet
> > > > >> > but a PR is raised already.
> > > > >> >
> > > > >> > Below are two ECRs approved by ASWG.
> > > > >> > RINTC - https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
> > > > >> > RHCT - https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view
> > > > >> >
> > > > >> > The series depends on Anup's IPI improvement series [2].
> > > > >> >
> > > > >> > [1] https://lore.kernel.org/all/20220821140918.3613-1-jszhang@kernel.org/
> > > > >> > [2] https://lore.kernel.org/lkml/20230103141221.772261-7-apatel@ventanamicro.com/T/
> > > > >>
> > > > >> Building a clang-15 allmodconfig (I didn't try gcc) with this series, and
> > > > >> Anup's IPI bits, results in a broken build, due to failings in cmpxchg:
> > > > >>
> > > > >> /stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
> > > > >>         while (unlikely((ret = cmpxchg(&c->value, old, new)) != old)) {
> > > > >>                                ^
> > >
> > > > > I am able to build without any of these issues using clang-15. I am
> > > > > wondering whether the base is proper. I had rebased on top of the master
> > > > > and couple of patches from IPI series were already merged in the master.
> > > > >
> > > > > Do you mind verifying with my branch
> > > > > https://github.com/vlsunil/linux/commits/acpi_b1_us_review_ipi17_V3?
> > > >
> > > > I can check that later I suppose.
> > >
> > > That's broken too.
> > >
> > > > > Or if you could provide me your branch details, I can look further.
> > > >
> > > > 6.3-rc1, with both series applied, sans Anups applied patches.
> > >
> > > I've pushed my stuff here, but unlikely that it makes any odds since
> > > your branch experiences the same build issue.
> > > https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ borked-acpi-surface
> > >
> > > My build commands are wrapped in a script, but it's an LLVM=1
> > > allmodconfig run w/ clang-15(.0.7) etc.
> > >
> > Ahh allmodconfig. Thank you very much!. I can reproduce the failure. Let
> > me look further and fix in next revision.
> >
> > Thanks!
> > Sunil
> 
> Hi Sunil
> 
> One question regarding PMU in ACPI flow.
> 
> We use DT to decode the supported HPM counters/events for the
> different platforms now.
> How do we enable PMU (drivers/perf/riscv_pmu_sbi.c) when using ACPI method?
> Note, this might be in separate patch series.
> 
Hi Lay Foon,

This driver uses SBI calls and hence should work in case of ACPI also.

There is one minor change required in this driver for overflow
interrupt. I have a patch for that in future series.

Thanks,
Sunil

Atish Patra April 6, 2023, 2:45 a.m. UTC | #8

On Tue, Apr 4, 2023 at 12:24 PM Sunil V L <sunilvl@ventanamicro.com> wrote:
>
> On Tue, Apr 04, 2023 at 02:35:19PM +0800, Ley Foon Tan wrote:
> > On Wed, Mar 8, 2023 at 9:08 AM Sunil V L <sunilvl@ventanamicro.com> wrote:
> > >
> > > On Tue, Mar 07, 2023 at 06:44:35PM +0000, Conor Dooley wrote:
> > > > On Tue, Mar 07, 2023 at 06:13:22AM +0000, Conor Dooley wrote:
> > > > >
> > > > >
> > > > > On 7 March 2023 05:06:16 GMT, Sunil V L <sunilvl@ventanamicro.com> wrote:
> > > > > >On Mon, Mar 06, 2023 at 09:51:09PM +0000, Conor Dooley wrote:
> > > > > >> Hey Sunil,
> > > > > >>
> > > > > >> On Fri, Mar 03, 2023 at 07:06:27PM +0530, Sunil V L wrote:
> > > > > >> > This patch series enables the basic ACPI infrastructure for RISC-V.
> > > > > >> > Supporting external interrupt controllers is in progress and hence it is
> > > > > >> > tested using poll based HVC SBI console and RAM disk.
> > > > > >> >
> > > > > >> > The first patch in this series is one of the patch from Jisheng's
> > > > > >> > series [1] which is not merged yet. This patch is required to support
> > > > > >> > ACPI since efi_init() which gets called before sbi_init() can enable
> > > > > >> > static branches and hits a panic.
> > > > > >> >
> > > > > >> > Patch 2 and 3 are ACPICA patches which are not merged into acpica yet
> > > > > >> > but a PR is raised already.
> > > > > >> >
> > > > > >> > Below are two ECRs approved by ASWG.
> > > > > >> > RINTC - https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
> > > > > >> > RHCT - https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view
> > > > > >> >
> > > > > >> > The series depends on Anup's IPI improvement series [2].
> > > > > >> >
> > > > > >> > [1] https://lore.kernel.org/all/20220821140918.3613-1-jszhang@kernel.org/
> > > > > >> > [2] https://lore.kernel.org/lkml/20230103141221.772261-7-apatel@ventanamicro.com/T/
> > > > > >>
> > > > > >> Building a clang-15 allmodconfig (I didn't try gcc) with this series, and
> > > > > >> Anup's IPI bits, results in a broken build, due to failings in cmpxchg:
> > > > > >>
> > > > > >> /stuff/linux/drivers/platform/surface/aggregator/controller.c:61:25: error: call to __compiletime_assert_335 declared with 'error' attribute: BUILD_BUG failed
> > > > > >>         while (unlikely((ret = cmpxchg(&c->value, old, new)) != old)) {
> > > > > >>                                ^
> > > >
> > > > > > I am able to build without any of these issues using clang-15. I am
> > > > > > wondering whether the base is proper. I had rebased on top of the master
> > > > > > and couple of patches from IPI series were already merged in the master.
> > > > > >
> > > > > > Do you mind verifying with my branch
> > > > > > https://github.com/vlsunil/linux/commits/acpi_b1_us_review_ipi17_V3?
> > > > >
> > > > > I can check that later I suppose.
> > > >
> > > > That's broken too.
> > > >
> > > > > > Or if you could provide me your branch details, I can look further.
> > > > >
> > > > > 6.3-rc1, with both series applied, sans Anups applied patches.
> > > >
> > > > I've pushed my stuff here, but unlikely that it makes any odds since
> > > > your branch experiences the same build issue.
> > > > https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ borked-acpi-surface
> > > >
> > > > My build commands are wrapped in a script, but it's an LLVM=1
> > > > allmodconfig run w/ clang-15(.0.7) etc.
> > > >
> > > Ahh allmodconfig. Thank you very much!. I can reproduce the failure. Let
> > > me look further and fix in next revision.
> > >
> > > Thanks!
> > > Sunil
> >
> > Hi Sunil
> >
> > One question regarding PMU in ACPI flow.
> >
> > We use DT to decode the supported HPM counters/events for the
> > different platforms now.
> > How do we enable PMU (drivers/perf/riscv_pmu_sbi.c) when using ACPI method?
> > Note, this might be in separate patch series.
> >
> Hi Lay Foon,
>
> This driver uses SBI calls and hence should work in case of ACPI also.
>
> There is one minor change required in this driver for overflow
> interrupt. I have a patch for that in future series.

Just to add further clarification: OpenSBI will continue to use the
device tree so that
the firmware will have access to all the PMU details.

>
> Thanks,
> Sunil

Ley Foon Tan April 19, 2023, 8:07 a.m. UTC | #9

On Thu, Apr 6, 2023 at 10:45 AM Atish Kumar Patra <atishp@rivosinc.com> wrote:
>

> > >
> > > Hi Sunil
> > >
> > > One question regarding PMU in ACPI flow.
> > >
> > > We use DT to decode the supported HPM counters/events for the
> > > different platforms now.
> > > How do we enable PMU (drivers/perf/riscv_pmu_sbi.c) when using ACPI method?
> > > Note, this might be in separate patch series.
> > >
> > Hi Lay Foon,
> >
> > This driver uses SBI calls and hence should work in case of ACPI also.
> >
> > There is one minor change required in this driver for overflow
> > interrupt. I have a patch for that in future series.
>
> Just to add further clarification: OpenSBI will continue to use the
> device tree so that
> the firmware will have access to all the PMU details.
>
Sorry for the late reply, missed out on this email in my kernel.org mailbox.

Do you mean OpenSBI still using the device tree, but EDK II and Linux
using the ACPI table? Normally Linux shouldn't mix between ACPI and
device tree.

Regards
Ley Foon

Atish Patra April 19, 2023, 11:34 p.m. UTC | #10

On Wed, Apr 19, 2023 at 1:38 PM Ley Foon Tan <lftan@kernel.org> wrote:
>
> On Thu, Apr 6, 2023 at 10:45 AM Atish Kumar Patra <atishp@rivosinc.com> wrote:
> >
>
> > > >
> > > > Hi Sunil
> > > >
> > > > One question regarding PMU in ACPI flow.
> > > >
> > > > We use DT to decode the supported HPM counters/events for the
> > > > different platforms now.
> > > > How do we enable PMU (drivers/perf/riscv_pmu_sbi.c) when using ACPI method?
> > > > Note, this might be in separate patch series.
> > > >
> > > Hi Lay Foon,
> > >
> > > This driver uses SBI calls and hence should work in case of ACPI also.
> > >
> > > There is one minor change required in this driver for overflow
> > > interrupt. I have a patch for that in future series.
> >
> > Just to add further clarification: OpenSBI will continue to use the
> > device tree so that
> > the firmware will have access to all the PMU details.
> >
> Sorry for the late reply, missed out on this email in my kernel.org mailbox.
>
> Do you mean OpenSBI still using the device tree, but EDK II and Linux
> using the ACPI table? Normally Linux shouldn't mix between ACPI and

Yes. For Linux, it will only be ACPI. Otherwise, we have to define all
those bindings in ACPI as well.
In the future, we will have supervisor counter delegation ISA
extension(in progress) that allows the kernel to directly program
the hpmevents & modify counters without needing SBI PMU extension.


> device tree.
>


> Regards
> Ley Foon
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

[V3,00/20] Add basic ACPI support for RISC-V

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