[v5,0/1] Risc-V Svinval support

Message

Mayuresh Chitale June 23, 2023, 12:38 p.m. UTC

This patch adds support for the Svinval extension as defined in the
Risc V Privileged specification. 

Changes in v5:
- Reduce tlb flush threshold to 64
- Improve implementation of local_flush_tlb* functions

Changes in v4:
- Rebase and refactor as per latest changes on torvalds/master
- Drop patch 1 in the series

Changes in v3:
- Fix incorrect vma used for sinval instructions
- Use unified static key mechanism for svinval
- Rebased on torvalds/master

Changes in v2:
- Rebased on 5.18-rc3
- update riscv_fill_hwcap to probe Svinval extension


Mayuresh Chitale (1):
  riscv: mm: use svinval instructions instead of sfence.vma

 arch/riscv/include/asm/tlbflush.h |  1 +
 arch/riscv/mm/tlbflush.c          | 66 +++++++++++++++++++++++++++----
 2 files changed, 59 insertions(+), 8 deletions(-)

Comments

Palmer Dabbelt Sept. 25, 2023, 3:12 p.m. UTC | #1

On Fri, 23 Jun 2023 05:38:48 PDT (-0700), [e-mail] wrote:
> This patch adds support for the Svinval extension as defined in the
> Risc V Privileged specification.

Do you have benchmarks (like we asked for here 
<https://lore.kernel.org/all/[e-mail]/>)?

>
> Changes in v5:
> - Reduce tlb flush threshold to 64
> - Improve implementation of local_flush_tlb* functions
>
> Changes in v4:
> - Rebase and refactor as per latest changes on torvalds/master
> - Drop patch 1 in the series
>
> Changes in v3:
> - Fix incorrect vma used for sinval instructions
> - Use unified static key mechanism for svinval
> - Rebased on torvalds/master
>
> Changes in v2:
> - Rebased on 5.18-rc3
> - update riscv_fill_hwcap to probe Svinval extension
>
>
> Mayuresh Chitale (1):
>   riscv: mm: use svinval instructions instead of sfence.vma
>
>  arch/riscv/include/asm/tlbflush.h |  1 +
>  arch/riscv/mm/tlbflush.c          | 66 +++++++++++++++++++++++++++----
>  2 files changed, 59 insertions(+), 8 deletions(-)