mbox series

[v1,0/6] Risc-V Kvm Smstateen

Message ID 20230719160316.4048022-1-mchitale@ventanamicro.com (mailing list archive)
Headers show
Series Risc-V Kvm Smstateen | expand

Message

Mayuresh Chitale July 19, 2023, 4:03 p.m. UTC
This series adds support to detect the Smstateen extension for both, the
host and the guest vcpu. It also adds senvcfg and sstateen0 to the ONE_REG
interface and the vcpu context save/restore.

Mayuresh Chitale (6):
  RISC-V: Detect Smstateen extension
  RISC-V: KVM: Add kvm_vcpu_config
  RISC-V: KVM: Enable Smstateen accesses
  RISCV: KVM: Add senvcfg context save/restore
  RISCV: KVM: Add sstateen0 context save/restore
  RISCV: KVM: Add sstateen0 to ONE_REG

 arch/riscv/include/asm/csr.h      | 18 ++++++
 arch/riscv/include/asm/hwcap.h    |  1 +
 arch/riscv/include/asm/kvm_host.h | 18 ++++++
 arch/riscv/include/uapi/asm/kvm.h | 11 ++++
 arch/riscv/kernel/cpu.c           |  1 +
 arch/riscv/kernel/cpufeature.c    |  2 +
 arch/riscv/kvm/vcpu.c             | 97 ++++++++++++++++++++++++++-----
 7 files changed, 135 insertions(+), 13 deletions(-)