mbox series

[RESEND,0/3] riscv: vdso.lds.S: some improvement

Message ID 20230912072015.2424-1-jszhang@kernel.org (mailing list archive)
Headers show
Series riscv: vdso.lds.S: some improvement | expand

Message

Jisheng Zhang Sept. 12, 2023, 7:20 a.m. UTC 
This series renews one of my last year RFC patch[1], tries to improve
the vdso layout a bit. 

patch1 removes useless symbols
patch2 merges .data section of vdso into .rodata because they are
readonly
patch3 is the real renew patch, it removes hardcoded 0x800 .text start
addr. But I rewrite the commit msg per Andrew's suggestions and move
move .note, .eh_frame_hdr, and .eh_frame between .rodata and .text to
keep the actual code well away from the non-instruction data.

Link: https://lore.kernel.org/linux-riscv/20221123161805.1579-1-jszhang@kernel.org/ [1]

Jisheng Zhang (3):
  riscv: vdso.lds.S: drop __alt_start and __alt_end symbols
  riscv: vdso.lds.S: merge .data section into .rodata section
  riscv: vdso.lds.S: remove hardcoded 0x800 .text start addr

 arch/riscv/kernel/vdso/vdso.lds.S | 30 +++++++++++++-----------------
 1 file changed, 13 insertions(+), 17 deletions(-)

Comments

patchwork-bot+linux-riscv@kernel.org Nov. 6, 2023, 3 p.m. UTC | #1 
Hello:

This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Tue, 12 Sep 2023 15:20:12 +0800 you wrote:
> This series renews one of my last year RFC patch[1], tries to improve
> the vdso layout a bit.
> 
> patch1 removes useless symbols
> patch2 merges .data section of vdso into .rodata because they are
> readonly
> patch3 is the real renew patch, it removes hardcoded 0x800 .text start
> addr. But I rewrite the commit msg per Andrew's suggestions and move
> move .note, .eh_frame_hdr, and .eh_frame between .rodata and .text to
> keep the actual code well away from the non-instruction data.
> 
> [...]

Here is the summary with links:
  - [RESEND,1/3] riscv: vdso.lds.S: drop __alt_start and __alt_end symbols
    https://git.kernel.org/riscv/c/ddcc7d9bf531
  - [RESEND,2/3] riscv: vdso.lds.S: merge .data section into .rodata section
    https://git.kernel.org/riscv/c/49cfbdc21faf
  - [RESEND,3/3] riscv: vdso.lds.S: remove hardcoded 0x800 .text start addr
    https://git.kernel.org/riscv/c/8f8c1ff879fa

You are awesome, thank you!