[v2,0/3] Add Svadu Extension Support

Message

Yong-Xuan Wang Sept. 22, 2023, 8:56 a.m. UTC

Svadu is a RISC-V extension for hardware updating of PTE A/D bits. This
patch set adds support to enable Svadu extension for both host and guest
OS.

---
v2:
- add Co-developed-by: in PATCH1
- use riscv_has_extension_unlikely() to runtime patch the branch in PATCH1
- update dt-binding

Yong-Xuan Wang (3):
  RISC-V: Detect and Enable Svadu Extension Support
  dt-bindings: riscv: Add Svadu Entry
  RISC-V: KVM: Add Svadu Extension Support for Guest/VM

 Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
 arch/riscv/include/asm/csr.h                            | 1 +
 arch/riscv/include/asm/hwcap.h                          | 1 +
 arch/riscv/include/asm/pgtable.h                        | 6 ++++++
 arch/riscv/include/uapi/asm/kvm.h                       | 1 +
 arch/riscv/kernel/cpufeature.c                          | 1 +
 arch/riscv/kvm/vcpu.c                                   | 3 +++
 arch/riscv/kvm/vcpu_onereg.c                            | 1 +
 8 files changed, 20 insertions(+)