mbox series

[v2,0/3] RISC-V, KVM: add 'vlenb' and vector CSRs to get-reg-list

Message ID 20231205135041.2208004-1-dbarboza@ventanamicro.com (mailing list archive)
Headers show
Series RISC-V, KVM: add 'vlenb' and vector CSRs to get-reg-list | expand

Message

Daniel Henrique Barboza Dec. 5, 2023, 1:50 p.m. UTC 
Hi,

This v2 has a build warning fix in patch 3 found by kernel test robot
<lkp@intel.com>.

Changes from v1:
- patch 3:
  - remove unused 'cntx' pointer
- v1 link: https://lore.kernel.org/kvm/20231204182905.2163676-1-dbarboza@ventanamicro.com/

Daniel Henrique Barboza (3):
  RISC-V: KVM: set 'vlenb' in kvm_riscv_vcpu_alloc_vector_context()
  RISC-V: KVM: add 'vlenb' Vector CSR
  RISC-V: KVM: add vector CSRs in KVM_GET_REG_LIST

 arch/riscv/kvm/vcpu_onereg.c | 35 +++++++++++++++++++++++++++++++++++
 arch/riscv/kvm/vcpu_vector.c | 16 ++++++++++++++++
 2 files changed, 51 insertions(+)