| Message ID | 20231213131321.12862-1-andy.chiu@sifive.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | riscv: support kernel-mode Vector | expand |
On Wed, Dec 13, 2023 at 9:13 PM Andy Chiu <andy.chiu@sifive.com> wrote: > > This series provides support for running Vector code in kernel mode. > Along with the suport, we add some Vector optimized routines. And > provide a simple threshold to decide when to run the vectorized > functions. > > We decided to split the patch series into 2 parts. The first part > contains running kernel-mode Vector with preemption disabled. The second > part will add support for running Vector with preemption. > > This patch is tested on a QEMU with V and verified that booting, normal > userspace operations all work as usual with thresholds set to 0. > > v3 of this series can be found at [1] > > Link: https://lore.kernel.org/all/20231019154552.23351-1-andy.chiu@sifive.com/ > > Patch summary (on current order): > - Updated patches: 1, 4 > - New patch: 2, 5, 6 > - Unchanged patch: 3 > - Deleted patch: Patches related to preempt_v will be sent separately > > Changelog v4: > - Rebase on top of riscv for-next (6.7-rc1) Sorry, it's too bad that I missed this. I found that this patch is actually based on top of 6.6-rc1. I will send out a v5 later today, which will be tested and based on top of the tip. Sorry for disturbing the list. > - Use kernel_v_flags and helpers to track vector context. > - Prevent softirq from nesting V context for non-preempt V > - Add user copy and mem* routines > > Changelog v3: > - Rebase on top of riscv for-next (6.6-rc1) > - Fix a build issue (Conor) > - Guard vstate_save, vstate_restore with {get,put}_cpu_vector_context. > - Save V context after disabling preemption. (Guo) > - Remove irqs_disabled() check from may_use_simd(). (Björn) > - Comment about nesting V context. > > Changelog v2: > - fix build issues > - Follow arm's way of starting kernel-mode simd code: > - add include/asm/simd.h and rename may_use_vector() -> > may_use_simd() > - return void in kernel_vector_begin(), and BUG_ON if may_use_simd() > fails > - Change naming scheme for functions/macros (Conor): > - remove KMV > - 's/rvv/vector/' > - 's/RISCV_ISA_V_PREEMPTIVE_KMV/RISCV_ISA_V_PREEMPTIVE/' > - 's/TIF_RISCV_V_KMV/TIF_RISCV_V_KERNEL_MODE/' > > Andy Chiu (4): > riscv: vector: make Vector always available for softirq context > riscv: sched: defer restoring Vector context for user > riscv: lib: vectorize copy_to_user/copy_from_user > riscv: lib: add vectorized mem* routines > > Greentime Hu (2): > riscv: Add support for kernel mode vector > riscv: Add vector extension XOR implementation > > arch/riscv/include/asm/entry-common.h | 17 +++++ > arch/riscv/include/asm/processor.h | 15 +++- > arch/riscv/include/asm/simd.h | 46 +++++++++++ > arch/riscv/include/asm/thread_info.h | 2 + > arch/riscv/include/asm/vector.h | 32 +++++++- > arch/riscv/include/asm/xor.h | 82 ++++++++++++++++++++ > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/kernel_mode_vector.c | 101 +++++++++++++++++++++++++ > arch/riscv/kernel/process.c | 4 +- > arch/riscv/kernel/ptrace.c | 5 +- > arch/riscv/kernel/signal.c | 5 +- > arch/riscv/kernel/vector.c | 2 +- > arch/riscv/lib/Makefile | 6 ++ > arch/riscv/lib/memcpy_vector.S | 29 +++++++ > arch/riscv/lib/memmove_vector.S | 49 ++++++++++++ > arch/riscv/lib/memset.S | 2 +- > arch/riscv/lib/memset_vector.S | 33 ++++++++ > arch/riscv/lib/riscv_v_helpers.c | 59 +++++++++++++++ > arch/riscv/lib/uaccess.S | 11 +++ > arch/riscv/lib/uaccess_vector.S | 55 ++++++++++++++ > arch/riscv/lib/xor.S | 81 ++++++++++++++++++++ > 21 files changed, 630 insertions(+), 7 deletions(-) > create mode 100644 arch/riscv/include/asm/simd.h > create mode 100644 arch/riscv/include/asm/xor.h > create mode 100644 arch/riscv/kernel/kernel_mode_vector.c > create mode 100644 arch/riscv/lib/memcpy_vector.S > create mode 100644 arch/riscv/lib/memmove_vector.S > create mode 100644 arch/riscv/lib/memset_vector.S > create mode 100644 arch/riscv/lib/riscv_v_helpers.c > create mode 100644 arch/riscv/lib/uaccess_vector.S > create mode 100644 arch/riscv/lib/xor.S > > -- > 2.17.1 > Regards, Andy
This series provides support for running Vector code in kernel mode. Along with the suport, we add some Vector optimized routines. And provide a simple threshold to decide when to run the vectorized functions. We decided to split the patch series into 2 parts. The first part contains running kernel-mode Vector with preemption disabled. The second part will add support for running Vector with preemption. This patch is tested on a QEMU with V and verified that booting, normal userspace operations all work as usual with thresholds set to 0. v3 of this series can be found at [1] Link: https://lore.kernel.org/all/20231019154552.23351-1-andy.chiu@sifive.com/ Patch summary (on current order): - Updated patches: 1, 4 - New patch: 2, 5, 6 - Unchanged patch: 3 - Deleted patch: Patches related to preempt_v will be sent separately Changelog v4: - Rebase on top of riscv for-next (6.7-rc1) - Use kernel_v_flags and helpers to track vector context. - Prevent softirq from nesting V context for non-preempt V - Add user copy and mem* routines Changelog v3: - Rebase on top of riscv for-next (6.6-rc1) - Fix a build issue (Conor) - Guard vstate_save, vstate_restore with {get,put}_cpu_vector_context. - Save V context after disabling preemption. (Guo) - Remove irqs_disabled() check from may_use_simd(). (Björn) - Comment about nesting V context. Changelog v2: - fix build issues - Follow arm's way of starting kernel-mode simd code: - add include/asm/simd.h and rename may_use_vector() -> may_use_simd() - return void in kernel_vector_begin(), and BUG_ON if may_use_simd() fails - Change naming scheme for functions/macros (Conor): - remove KMV - 's/rvv/vector/' - 's/RISCV_ISA_V_PREEMPTIVE_KMV/RISCV_ISA_V_PREEMPTIVE/' - 's/TIF_RISCV_V_KMV/TIF_RISCV_V_KERNEL_MODE/' Andy Chiu (4): riscv: vector: make Vector always available for softirq context riscv: sched: defer restoring Vector context for user riscv: lib: vectorize copy_to_user/copy_from_user riscv: lib: add vectorized mem* routines Greentime Hu (2): riscv: Add support for kernel mode vector riscv: Add vector extension XOR implementation arch/riscv/include/asm/entry-common.h | 17 +++++ arch/riscv/include/asm/processor.h | 15 +++- arch/riscv/include/asm/simd.h | 46 +++++++++++ arch/riscv/include/asm/thread_info.h | 2 + arch/riscv/include/asm/vector.h | 32 +++++++- arch/riscv/include/asm/xor.h | 82 ++++++++++++++++++++ arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/kernel_mode_vector.c | 101 +++++++++++++++++++++++++ arch/riscv/kernel/process.c | 4 +- arch/riscv/kernel/ptrace.c | 5 +- arch/riscv/kernel/signal.c | 5 +- arch/riscv/kernel/vector.c | 2 +- arch/riscv/lib/Makefile | 6 ++ arch/riscv/lib/memcpy_vector.S | 29 +++++++ arch/riscv/lib/memmove_vector.S | 49 ++++++++++++ arch/riscv/lib/memset.S | 2 +- arch/riscv/lib/memset_vector.S | 33 ++++++++ arch/riscv/lib/riscv_v_helpers.c | 59 +++++++++++++++ arch/riscv/lib/uaccess.S | 11 +++ arch/riscv/lib/uaccess_vector.S | 55 ++++++++++++++ arch/riscv/lib/xor.S | 81 ++++++++++++++++++++ 21 files changed, 630 insertions(+), 7 deletions(-) create mode 100644 arch/riscv/include/asm/simd.h create mode 100644 arch/riscv/include/asm/xor.h create mode 100644 arch/riscv/kernel/kernel_mode_vector.c create mode 100644 arch/riscv/lib/memcpy_vector.S create mode 100644 arch/riscv/lib/memmove_vector.S create mode 100644 arch/riscv/lib/memset_vector.S create mode 100644 arch/riscv/lib/riscv_v_helpers.c create mode 100644 arch/riscv/lib/uaccess_vector.S create mode 100644 arch/riscv/lib/xor.S