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([152.115.213.158]) by smtp.gmail.com with ESMTPSA id tm6-20020a170907c38600b00a1db955c809sm10789122ejc.73.2023.12.15.06.39.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 06:39:08 -0800 (PST) From: Emil Renner Berthing To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Hoan Tran , Serge Semin , Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jisheng Zhang , Guo Ren , Fu Wei , Paul Walmsley , Palmer Dabbelt Subject: [PATCH v1 0/8] Add T-Head TH15020 SoC pin control Date: Fri, 15 Dec 2023 15:38:58 +0100 Message-Id: <20231215143906.3651122-1-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231215_063914_215802_0F855472 X-CRM114-Status: GOOD ( 15.91 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This adds a pin control driver for the T-Head TH1520 RISC-V SoC used on the Lichee Pi 4A and BeagleV Ahead boards and updates the device trees to make use of it. It can be easily tested using my th1520 branch at https://github.com/esmil/linux.git ..which also adds the MMC, PWM, ethernet and USB drivers that have been posted but are not upstream yet. Jisheng: I've added this driver to the generic TH1520 entry in MAINTAINERS like you did with your USB driver. Let me know if that's not ok and I'll create a separate entry for this driver with me as maintainer. Drew: The last patch is purely based on reading the schematics. It'd be great if you could give it a spin on real hardware. /Emil Emil Renner Berthing (8): dt-bindings: pinctrl: Add thead,th1520-pinctrl bindings pinctrl: Add driver for the T-Head TH1520 SoC riscv: dts: thead: Add TH1520 pin control nodes dt-bindings: gpio: dwapb: allow gpio-ranges riscv: dts: thead: Add TH1520 GPIO ranges riscv: dts: thead: Adjust TH1520 GPIO labels riscv: dts: thead: Add TH1520 pinctrl settings for UART0 riscv: dtb: thead: Add BeagleV Ahead LEDs .../bindings/gpio/snps,dw-apb-gpio.yaml | 2 + .../pinctrl/thead,th1520-pinctrl.yaml | 156 ++++ MAINTAINERS | 1 + .../boot/dts/thead/th1520-beaglev-ahead.dts | 83 ++ .../boot/dts/thead/th1520-lichee-pi-4a.dts | 28 + arch/riscv/boot/dts/thead/th1520.dtsi | 53 +- drivers/pinctrl/Kconfig | 9 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl-th1520.c | 796 ++++++++++++++++++ 9 files changed, 1113 insertions(+), 16 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml create mode 100644 drivers/pinctrl/pinctrl-th1520.c