[v3,0/9] Enable networking support for StarFive JH7100 SoC

Message

Cristian Ciocaltea Dec. 15, 2023, 8:40 p.m. UTC

This patch series adds ethernet support for the StarFive JH7100 SoC and makes it
available for the StarFive VisionFive V1 and BeagleV Starlight boards, although
I could only validate on the former SBC.  Thank you Emil and Geert for helping
with tests on BeagleV!

The work is heavily based on the reference implementation [1] and depends the
SiFive Composable Cache controller and non-coherent DMA support provided by Emil
via [2] and [3].

*Update*: as of next-20231214, all dependencies have been merged.

[1] https://github.com/starfive-tech/linux/commits/visionfive
[2] https://lore.kernel.org/all/[e-mail]/
[3] https://lore.kernel.org/all/[e-mail]/

Changes in v3:
 - Rebased series onto next-20231214 and dropped the ccache & DMA coherency
   related patches (v2 06-08/12) handled by Emil via [3]
 - Squashed PATCH v2 01/12 into PATCH v3 2/9, per Krzysztof's review
 - Dropped incorrect PATCH v2 02/12
 - Incorporated Emil's feedback; also added his Co-developed-by on all dts
   patches
 - Documented the need of adjusting RX internal delay in PATCH v3 8/9, per
   Andrew's request
 - Added clock fixes from Emil (PATCH v3 8-9/9) required to support 10/100Mb
   link speeds
 - v2:
   https://lore.kernel.org/lkml/[e-mail]/

Changes in v2:
 - Dropped ccache PATCH 01-05 reworked by Emil via [2]
 - Dropped already applied PATCH 06/12
 - Added PATCH v2 01 to prepare snps-dwmac binding for JH7100 support
 - Added PATCH v2 02-03 to provide some jh7110-dwmac binding optimizations
 - Handled JH7110 conflicting work in PATCH 07 via PATCH v2 04
 - Reworked PATCH 8 via PATCH v2 05, adding JH7100 quirk and dropped
   starfive,gtxclk-dlychain DT property; also fixed register naming
 - Added PATCH v2 08 providing DMA coherency related DT changes
 - Updated PATCH 9 commit msg:
   s/OF_DMA_DEFAULT_COHERENT/ARCH_DMA_DEFAULT_COHERENT/
 - Replaced 'uncached-offset' property with 'sifive,cache-ops' in PATCH 10/12
   and dropped 'sideband' reg
 - Add new patch providing coherent DMA memory pool (PATCH v2 10)
 - Updated PATCH 11/12 according to the stmmac glue layer changes in upstream
 - Split PATCH 12/12 into PATCH v2 10-12 to handle individual gmac setup of
   VisionFive v1 and BeagleV boards as they use different PHYs; also switched
   phy-mode from "rgmii-tx" to "rgmii-id" (requires a reduction of
   rx-internal-delay-ps by ~50%)
 - Rebased series onto next-20231024
 - v1:
   https://lore.kernel.org/lkml/[e-mail]/

Cristian Ciocaltea (7):
  dt-bindings: net: starfive,jh7110-dwmac: Drop redundant reset
    description
  dt-bindings: net: starfive,jh7110-dwmac: Add JH7100 SoC compatible
  net: stmmac: dwmac-starfive: Add support for JH7100 SoC
  riscv: dts: starfive: jh7100: Add sysmain and gmac DT nodes
  riscv: dts: starfive: jh7100-common: Setup pinmux and enable gmac
  riscv: dts: starfive: visionfive-v1: Setup ethernet phy
  riscv: dts: starfive: beaglev-starlight: Setup phy reset gpio

Emil Renner Berthing (2):
  clk: starfive: Add flags argument to JH71X0__MUX macro
  clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx

 .../devicetree/bindings/net/snps,dwmac.yaml   |  3 +-
 .../bindings/net/starfive,jh7110-dwmac.yaml   | 75 +++++++++++-----
 .../dts/starfive/jh7100-beaglev-starlight.dts |  7 ++
 .../boot/dts/starfive/jh7100-common.dtsi      | 85 +++++++++++++++++++
 .../jh7100-starfive-visionfive-v1.dts         |  7 ++
 arch/riscv/boot/dts/starfive/jh7100.dtsi      | 37 ++++++++
 .../clk/starfive/clk-starfive-jh7100-audio.c  |  2 +-
 drivers/clk/starfive/clk-starfive-jh7100.c    | 32 +++----
 .../clk/starfive/clk-starfive-jh7110-aon.c    |  6 +-
 .../clk/starfive/clk-starfive-jh7110-isp.c    |  2 +-
 .../clk/starfive/clk-starfive-jh7110-sys.c    | 26 +++---
 drivers/clk/starfive/clk-starfive-jh71x0.h    |  4 +-
 drivers/net/ethernet/stmicro/stmmac/Kconfig   |  6 +-
 .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 32 ++++++-
 14 files changed, 258 insertions(+), 66 deletions(-)