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Mon, 12 Feb 2024 04:17:33 -0800 (PST) X-Forwarded-Encrypted: i=1; AJvYcCUYA8Xz5X9EaPh/+2SLYWC4a0TJgPvUOO27bVLQYpVaU5SGcwZsmMpHBougkK2XTigazcx1bA8Ak0t8ElLVcBUxwi1zB/8PJOrmrbKJN1FTyHVxMFLmgM4OyReOS/8ruOqxTSGJA4OWO6H4hhwYMLymcwuZoaOh92N3sy/nBfS/dR6iI6tCDs5gzJN/MIGAheQsCNqMO+JcVWBM7nJvk+l0sB+CrfCofsIvkh6NwWhcJVNfgcc8/5vbW8FpVOHdsZZK74eimU9+VKmawl0MhL2TVLc9ei8+aHK4TZClVLQN+MFdxONt/paHePhfZf46wQ0WK9cgEfEtthRrXnW5ZYTQ2a9+fdTXSaQdb5RrbMlno03vroOg1x/a6lrUBa1L1bCvtjYROSslGLWvl3nIqxkHCva8dRK+LpttCOfm/6z4GqbEc/Ig8PFW9o1IqBcdFh06Vu85JkTP50Pkd7DC Received: from localhost ([46.3.240.101]) by smtp.gmail.com with ESMTPSA id e21-20020a170902d39500b001d8e5a3be8asm242216pld.259.2024.02.12.04.17.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Feb 2024 04:17:33 -0800 (PST) From: Jingbao Qiu To: u.kleine-koenig@pengutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dlan@gentoo.org, inochiama@outlook.com, Jingbao Qiu Subject: [PATCH v2 0/2] riscv: pwm: sophgo: add pwm support for CV1800 Date: Mon, 12 Feb 2024 20:17:27 +0800 Message-Id: <20240212121729.1086718-1-qiujingbao.dlmu@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240212_041736_198239_A0C6DF45 X-CRM114-Status: GOOD ( 11.27 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The Sophgo CV1800 chip provides a set of four independent PWM channel outputs. This series adds PWM controller support for Sophgo cv1800. Changes since v1: - drop full stop from subject - re-order maintainers and description - pass checkpatch.pl --strict - fix naming errors - add "Limitations" section - use a driver specific prefix for all defines - using bool instead u32 in cv1800_pwm_enable - check and set state->polarity - use mul_u64_u64_div_u64 - use clk_rate_exclusive_get(), balance with clk_rate_exclusive_put() - using macro definitions instead of shift operations - remove shift operation on 0 - use priv replace cv_pwm - hardcode npwm - set atomic to true - remove MODULE_ALIAS v1: https://lore.kernel.org/all/20240207055856.672184-1-qiujingbao.dlmu@gmail.com/ Jingbao Qiu (2): dt-bindings: pwm: sophgo: add pwm for Sophgo CV1800 series SoC pwm: sophgo: add pwm support for Sophgo CV1800 SoC .../bindings/pwm/sophgo,cv1800-pwm.yaml | 45 ++++ drivers/pwm/Kconfig | 10 + drivers/pwm/Makefile | 1 + drivers/pwm/pwm-cv1800.c | 248 ++++++++++++++++++ 4 files changed, 304 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml create mode 100644 drivers/pwm/pwm-cv1800.c base-commit: 7afc0e7f681e6efd6b826f003fc14c17b5093643