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Tue, 20 Feb 2024 06:42:58 +0000 Received: from ZQ0PR01MB1302.CHNPR01.prod.partner.outlook.cn ([fe80::9d68:58f1:62cc:f1d3]) by ZQ0PR01MB1302.CHNPR01.prod.partner.outlook.cn ([fe80::9d68:58f1:62cc:f1d3%4]) with mapi id 15.20.7270.047; Tue, 20 Feb 2024 06:42:58 +0000 From: Alex Soo To: Linus Walleij , Bartosz Golaszewski , Hal Feng , Ley Foon Tan , Jianlong Huang , Emil Renner Berthing , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Drew Fustini Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Paul Walmsley , Palmer Dabbelt , Albert Ou , Alex Soo Subject: [RFC PATCH v2 0/6] Add Pinctrl driver for Starfive JH8100 SoC Date: Tue, 20 Feb 2024 14:42:40 +0800 Message-ID: <20240220064246.467216-1-yuklin.soo@starfivetech.com> X-Mailer: git-send-email 2.43.0 X-ClientProxiedBy: BJXPR01CA0055.CHNPR01.prod.partner.outlook.cn (2406:e500:c211:12::22) To ZQ0PR01MB1302.CHNPR01.prod.partner.outlook.cn (2406:e500:c550:1b::9) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: ZQ0PR01MB1302:EE_|ZQ0PR01MB1239:EE_ X-MS-Office365-Filtering-Correlation-Id: 99166286-12d1-4211-5891-08dc31df2cba X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; 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This patch series adds pinctrl drivers for these 4 pinctrl domains and this patch series is depending on the JH8100 base patch series in [1] and [2]. The relevant dt-binding documentation for each pinctrl domain has been updated accordingly. [1] https://lore.kernel.org/lkml/20231201121410.95298-1-jeeheng.sia@starfivetech.com/ [2] https://lore.kernel.org/lkml/20231206115000.295825-1-jeeheng.sia@starfivetech.com/ --- Changes in v2: - Add "(always-on)" to document title to clarify acronym AON. - Replace "drive-strength" by "drive-strength-microamp". - Update "slew-rate" property in sys-east, sys-west, and aon document. - remove redundant "bindings" from commit subject and message. - Change regular expression "-[0-9]+$" to "-grp$" to standardize client node names to end with suffix "-grp" instead of "-". - Use 4 spaces indentation for DTS examples. - Update DTS examples in sys-east, sys-west, and aon document with client driver pinmuxing. - Remove redundant syscon and gmac macros from dt-binding header file. - Remove redundant register macros from dt-binding header file. - Add "wakeup-gpios" and "wakeup-source" to aon document. - Add "gpio-line-names" to sys-east and sys-west document. - Update the description of syscon register usage in each document. - Update sys-gmac and aon document with information of GMAC voltage. reference syscon and GMAC pad syscon. - Fix the pinctrl device nodes compatible string too long issue. - Move all common codes from subdrivers to the main driver. - Change the commit log to "add main and sys_east driver" to indicate the commit of both main and sys-east driver. - Turn pin_to_hwirq macro to a static inline function to hide gpio internal detail, and also, for easier code readability. - Change "JH8100_PADCFG_BIAS" to "JH8100_PADCFG_BIAS_MASK". - Change "#define JH8100_PADCFG_DS_4MA BIT(1)" to #define JH8100_PADCFG_DS_4MA (1U << 1)". - Replace "jh8100_gpio_request" by "pinctrl_gpio_request". - Replace "jh8100_gpio_free" by "pinctrl_gpio_free". - Replace "jh8100_gpio_set_config" by "gpiochip_generic_config". - Use irq_print_chip function to display irqchip name to user space. - Use girq to represent GPIO interrupt controller. - Update code to ensure wakeup-gpios is always an input line. - Remove the jh8100_gpio_add_pin_ranges function and use gpio-ranges in device tree to provide information for GPIO core to add pin range for each pinctrl. - Change "StarFive GPIO chip registered" to "StarFive JH8100 GPIO chip registered". --- Alex Soo (6): dt-bindings: pinctrl: starfive: Add JH8100 pinctrl pinctrl: starfive: jh8100: add main and sys_east driver pinctrl: starfive: jh8100: add pinctrl driver for sys_west domain pinctrl: starfive: jh8100: add pinctrl driver for sys_gmac domain pinctrl: starfive: jh8100: add pinctrl driver for AON domain riscv: dts: starfive: jh8100: add pinctrl device tree nodes .../pinctrl/starfive,jh8100-aon-pinctrl.yaml | 261 ++++ .../starfive,jh8100-sys-east-pinctrl.yaml | 223 ++++ .../starfive,jh8100-sys-gmac-pinctrl.yaml | 163 +++ .../starfive,jh8100-sys-west-pinctrl.yaml | 220 +++ MAINTAINERS | 7 + arch/riscv/boot/dts/starfive/jh8100-evb.dts | 5 + arch/riscv/boot/dts/starfive/jh8100-pinfunc.h | 418 ++++++ arch/riscv/boot/dts/starfive/jh8100.dtsi | 47 + drivers/pinctrl/starfive/Kconfig | 59 + drivers/pinctrl/starfive/Makefile | 6 + .../starfive/pinctrl-starfive-jh8100-aon.c | 154 +++ .../pinctrl-starfive-jh8100-sys-east.c | 224 ++++ .../pinctrl-starfive-jh8100-sys-gmac.c | 93 ++ .../pinctrl-starfive-jh8100-sys-west.c | 168 +++ .../starfive/pinctrl-starfive-jh8100.c | 1181 +++++++++++++++++ .../starfive/pinctrl-starfive-jh8100.h | 105 ++ .../pinctrl/starfive,jh8100-pinctrl.h | 103 ++ 17 files changed, 3437 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jh8100-aon-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jh8100-sys-east-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jh8100-sys-gmac-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jh8100-sys-west-pinctrl.yaml create mode 100644 arch/riscv/boot/dts/starfive/jh8100-pinfunc.h create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jh8100-aon.c create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jh8100-sys-east.c create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jh8100-sys-gmac.c create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jh8100-sys-west.c create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jh8100.c create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jh8100.h create mode 100644 include/dt-bindings/pinctrl/starfive,jh8100-pinctrl.h