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[62.178.148.172]) by smtp.gmail.com with ESMTPSA id z15-20020a170906270f00b00a46b8cd9b51sm5294078ejc.185.2024.03.27.03.31.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 03:31:32 -0700 (PDT) From: =?utf-8?q?Christoph_M=C3=BCllner?= To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Palmer Dabbelt , Paul Walmsley , Albert Ou , Philipp Tomsich , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Daniel Henrique Barboza , Heiko Stuebner , Cooper Qu , Zhiwei Liu , Huang Tao , Alistair Francis , Andrew Jones , Conor Dooley Cc: =?utf-8?q?Christoph_M=C3=BCllner?= Subject: [PATCH 0/2] RISC-V: Test th.mxstatus.MAEE bit before enabling MAEE Date: Wed, 27 Mar 2024 11:31:28 +0100 Message-ID: <20240327103130.3651950-1-christoph.muellner@vrull.eu> X-Mailer: git-send-email 2.44.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240327_033144_776168_5D06CB8B X-CRM114-Status: GOOD ( 10.39 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Currently, the Linux kernel suffers from a boot regression when running on the c906 QEMU emulation. Details have been reported here by Björn Töpel: https://lists.gnu.org/archive/html/qemu-devel/2024-01/msg04766.html The main issue is, that Linux enables MAEE for CPUs that have a T-Head mvendorid but QEMU maintainers don't want to emulate a CPU that uses reserved bits in PTEs. See also the following discussion for more context: https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg00775.html This series renames "T-Head PBMT" to "MAEE" and only enables it if the th.mxstatus.MAEE bit is set. Since th.mxstatus is only accessible in M-mode, this patch depends on the following OpenSBI series: http://lists.infradead.org/pipermail/opensbi/2024-March/006718.html The th.mxstatus CSR is documented here: https://github.com/T-head-Semi/thead-extension-spec/pull/45 The QEMU patch to emulate th.mxstatus with MAEE not set is here: https://lists.gnu.org/archive/html/qemu-devel/2024-03/msg06368.html After applying all referenced patchsets, this patchset allows to successfully boot a C906 QEMU system emulation ("-cpu thead-c906"). Christoph Müllner (2): riscv: thead: Rename T-Head PBMT to MAEE riscv: T-Head: Test availability bit before enabling MAEE errata arch/riscv/Kconfig.errata | 8 ++++---- arch/riscv/errata/thead/errata.c | 22 ++++++++++++++-------- arch/riscv/include/asm/errata_list.h | 20 ++++++++++---------- 3 files changed, 28 insertions(+), 22 deletions(-)