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[v2,0/2] RISC-V: Test th.sxstatus.MAEE bit before enabling MAEE

Message ID 20240329121414.688391-1-christoph.muellner@vrull.eu (mailing list archive)
Headers show
Series RISC-V: Test th.sxstatus.MAEE bit before enabling MAEE | expand

Message

Christoph Müllner March 29, 2024, 12:14 p.m. UTC 
Currently, the Linux kernel suffers from a boot regression when running
on the c906 QEMU emulation. Details have been reported here by Björn Töpel:
  https://lists.gnu.org/archive/html/qemu-devel/2024-01/msg04766.html

The main issue is, that Linux enables MAEE for CPUs that have a T-Head
mvendorid but QEMU maintainers don't want to emulate a CPU that uses
reserved bits in PTEs. See also the following discussion for more
context:
  https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg00775.html

This series renames "T-Head PBMT" to "MAEE" and only enables it if
the th.sxstatus.MAEE bit is set.

The th.sxstatus CSR is documented here:
  https://github.com/T-head-Semi/thead-extension-spec/pull/46

The QEMU patch to emulate th.sxstatus with MAEE not set is here:
  https://lore.kernel.org/all/20240329120427.684677-1-christoph.muellner@vrull.eu/

After applying the referenced QEMU patch, this patchset allows to
successfully boot a C906 QEMU system emulation ("-cpu thead-c906").

Christoph Müllner (2):
  riscv: thead: Rename T-Head PBMT to MAEE
  riscv: T-Head: Test availability bit before enabling MAEE errata

 arch/riscv/Kconfig.errata            |  8 ++++----
 arch/riscv/errata/thead/errata.c     | 22 ++++++++++++++--------
 arch/riscv/include/asm/errata_list.h | 20 ++++++++++----------
 3 files changed, 28 insertions(+), 22 deletions(-)