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Wed, 15 May 2024 14:26:28 -0700 (PDT) Received: from charlie.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-6f4d2af2b30sm11970243b3a.146.2024.05.15.14.26.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 May 2024 14:26:27 -0700 (PDT) From: Charlie Jenkins Subject: [PATCH 0/4] riscv: Separate vendor extensions from standard extensions Date: Wed, 15 May 2024 14:26:12 -0700 Message-Id: <20240515-support_vendor_extensions-v1-0-b05dd5ea7d8d@rivosinc.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAHUoRWYC/x3MQQqDMBBG4avIrA1MUoXSq5Qiof7qbJIwoyKId zft8i2+d5JBBUav5iTFLiY51fBtQ98lphlOxtoUOHTc+97ZVkrWddiRxqwDjhXph8zF+GQfGF1 4MFVfFJMc//f7c103bFmr7msAAAA= To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Evan Green Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Charlie Jenkins X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1715808387; l=3345; i=charlie@rivosinc.com; s=20231120; h=from:subject:message-id; bh=KgtJDY4MmMjQZ2oDl1XlntkBINAq3AfwA6pN/nCVnCQ=; b=AxcTBgTejyl75LE7zsplxZGT/C+vsiy+w5Marj3ZYgRQqiAw+EW+/tLQzQtaZ5A3LuVAEm4gU A6nqJX4xQAIBW4XHMWfOS5R96bGTC14zKzpldrvZJ/sYSfMIvanIxKJ X-Developer-Key: i=charlie@rivosinc.com; a=ed25519; pk=t4RSWpMV1q5lf/NWIeR9z58bcje60/dbtxxmoSfBEcs= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240515_142630_855416_E3C636D8 X-CRM114-Status: GOOD ( 12.54 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org All extensions, both standard and vendor, live in one struct "riscv_isa_ext". There is currently one vendor extension, xandespmu, but it is likely that more vendor extensions will be added to the kernel in the future. As more vendor extensions (and standard extensions) are added, riscv_isa_ext will become more bloated with a mix of vendor and standard extensions. This also allows each vendor to be conditionally enabled through Kconfig. --- This has been split out from the previous series that contained the addition of xtheadvector due to lack of reviews. The xtheadvector support will be posted again separately from this. The reviewed-bys on "riscv: Extend cpufeature.c to detect vendor extensions" and "riscv: Introduce vendor variants of extension helpers" have been dropped in this series. The majority of the code is the same in these patches, but thead-specific code is swapped out with andes-specific code. The changes are minimal, but I decided to drop the reviews in case I inadvertently introduced issues. The alternative patching code from "riscv: Introduce vendor variants of extension helpers" has been migrated to "riscv: Extend cpufeature.c to detect vendor extensions" such that the andes patching still works in that patch. I also fix a bug in this patch from the previous series that the Andes extensions were not being properly enabled due to the manual alternative patching not incrementing the id to be greater than RISCV_VENDOR_EXT_ALTERNATIVES_BASE. To: Paul Walmsley To: Palmer Dabbelt To: Albert Ou To: Conor Dooley To: Evan Green Cc: linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Charlie Jenkins --- Charlie Jenkins (4): riscv: Extend cpufeature.c to detect vendor extensions riscv: Add vendor extensions to /proc/cpuinfo riscv: Introduce vendor variants of extension helpers riscv: cpufeature: Extract common elements from extension checking arch/riscv/Kconfig | 2 + arch/riscv/Kconfig.vendor | 19 ++++ arch/riscv/errata/andes/errata.c | 3 + arch/riscv/errata/sifive/errata.c | 3 + arch/riscv/errata/thead/errata.c | 3 + arch/riscv/include/asm/cpufeature.h | 96 ++++++++++------ arch/riscv/include/asm/hwcap.h | 1 - arch/riscv/include/asm/vendor_extensions.h | 103 +++++++++++++++++ arch/riscv/include/asm/vendor_extensions/andes.h | 19 ++++ arch/riscv/kernel/Makefile | 2 + arch/riscv/kernel/cpu.c | 35 +++++- arch/riscv/kernel/cpufeature.c | 135 +++++++++++++++++------ arch/riscv/kernel/vendor_extensions.c | 56 ++++++++++ arch/riscv/kernel/vendor_extensions/Makefile | 3 + arch/riscv/kernel/vendor_extensions/andes.c | 18 +++ drivers/perf/riscv_pmu_sbi.c | 11 +- 16 files changed, 435 insertions(+), 74 deletions(-) --- base-commit: a38297e3fb012ddfa7ce0321a7e5a8daeb1872b6 change-id: 20240515-support_vendor_extensions-aa80120e4230