| Message ID | 20240527-sg2002-v1-0-1b6cb38ce8f4@bootlin.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add board support for Sipeed LicheeRV Nano | expand |
On Mon, 27 May 2024 12:28:16 +0200, Thomas Bonnefille wrote: > The LicheeRV Nano is a RISC-V SBC based on the Sophgo SG2002 chip. Adds > minimal device tree files for this board to make it boot to a basic > shell. > > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> > --- > Thomas Bonnefille (5): > dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic > dt-bindings: timer: Add SOPHGO SG2002 clint > dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles > riscv: dts: sophgo: Add initial SG2002 SoC device tree > riscv: dts: sophgo: Add LicheeRV Nano board device tree > > .../interrupt-controller/sifive,plic-1.0.0.yaml | 1 + > .../devicetree/bindings/riscv/sophgo.yaml | 4 +++ > .../devicetree/bindings/timer/sifive,clint.yaml | 1 + > arch/riscv/boot/dts/sophgo/Makefile | 1 + > .../boot/dts/sophgo/sg2002-lichee-rv-nano.dts | 25 ++++++++++++++++++ > arch/riscv/boot/dts/sophgo/sg2002.dtsi | 30 ++++++++++++++++++++++ > 6 files changed, 62 insertions(+) > --- > base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 > change-id: 20240515-sg2002-93dce1d263be > > Best regards, > -- > Thomas Bonnefille <thomas.bonnefille@bootlin.com> > > > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade New warnings running 'make CHECK_DTBS=y sophgo/sg2002-lichee-rv-nano.dtb' for 20240527-sg2002-v1-0-1b6cb38ce8f4@bootlin.com: arch/riscv/boot/dts/sophgo/sg2002-lichee-rv-nano.dtb: oscillator: 'clock-frequency' is a required property from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
The LicheeRV Nano is a RISC-V SBC based on the Sophgo SG2002 chip. Adds minimal device tree files for this board to make it boot to a basic shell. Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> --- Thomas Bonnefille (5): dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic dt-bindings: timer: Add SOPHGO SG2002 clint dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles riscv: dts: sophgo: Add initial SG2002 SoC device tree riscv: dts: sophgo: Add LicheeRV Nano board device tree .../interrupt-controller/sifive,plic-1.0.0.yaml | 1 + .../devicetree/bindings/riscv/sophgo.yaml | 4 +++ .../devicetree/bindings/timer/sifive,clint.yaml | 1 + arch/riscv/boot/dts/sophgo/Makefile | 1 + .../boot/dts/sophgo/sg2002-lichee-rv-nano.dts | 25 ++++++++++++++++++ arch/riscv/boot/dts/sophgo/sg2002.dtsi | 30 ++++++++++++++++++++++ 6 files changed, 62 insertions(+) --- base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 change-id: 20240515-sg2002-93dce1d263be Best regards,