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[92.145.124.62]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-35579d7da64sm12293475f8f.4.2024.05.28.08.10.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 May 2024 08:10:54 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Peter Zijlstra , Ingo Molnar , Will Deacon , Waiman Long , Boqun Feng , Arnd Bergmann , Leonardo Bras , Guo Ren , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arch@vger.kernel.org Cc: Alexandre Ghiti Subject: [PATCH 0/7] Zacas/Zabha support and qspinlocks Date: Tue, 28 May 2024 17:10:45 +0200 Message-Id: <20240528151052.313031-1-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240528_081059_278858_06F31F5E X-CRM114-Status: GOOD ( 10.72 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This implements [cmp]xchgXX() macros using Zacas and Zabha extensions and finally uses those newly introduced macros to add support for qspinlocks: note that this implementation of qspinlocks satisfies the forward progress guarantee. Thanks to Guo and Leonardo for their work! Alexandre Ghiti (5): riscv: Implement cmpxchg32/64() using Zacas riscv: Implement cmpxchg8/16() using Zabha riscv: Implement arch_cmpxchg128() using Zacas riscv: Implement xchg8/16() using Zabha riscv: Add qspinlock support based on Zabha extension Guo Ren (2): asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock asm-generic: ticket-lock: Add separate ticket-lock.h .../locking/queued-spinlocks/arch-support.txt | 2 +- arch/riscv/Kconfig | 35 ++++++ arch/riscv/Makefile | 21 ++++ arch/riscv/include/asm/Kbuild | 4 +- arch/riscv/include/asm/cmpxchg.h | 114 ++++++++++++++++-- arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/include/asm/spinlock.h | 39 ++++++ arch/riscv/kernel/cpufeature.c | 1 + arch/riscv/kernel/setup.c | 18 +++ include/asm-generic/qspinlock.h | 2 + include/asm-generic/spinlock.h | 87 +------------ include/asm-generic/spinlock_types.h | 12 +- include/asm-generic/ticket_spinlock.h | 105 ++++++++++++++++ 13 files changed, 336 insertions(+), 105 deletions(-) create mode 100644 arch/riscv/include/asm/spinlock.h create mode 100644 include/asm-generic/ticket_spinlock.h