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Tue, 9 Jul 2024 15:05:08 GMT Received: from tengfan-gv.ap.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 9 Jul 2024 08:05:01 -0700 From: Tengfei Fan Subject: [PATCH v2 0/2] soc: qcom: llcc: Add QCS9100 LLCC compatible Date: Tue, 9 Jul 2024 23:04:43 +0800 Message-ID: <20240709-add_qcs9100_llcc_compatible-v2-0-99d203616eed@quicinc.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAIxRjWYC/zXNQQqDMBCF4atI1o2MoyHaVe9RJMQYdcBGTay0i HdvFLr83uJ/OwvWkw3snuzM240CTS4Cbwkzg3a95dRGMwQsQELFdduqxYQqA1DjaIwy02vWKzW j5XkhpRBVo9Eii4XZ244+V/1ZRw8U1sl/r7MtO9d/NwcUpYAUM4kAJc/48iajVuv6TrvHCXImj V+sPo7jBy7Le7a3AAAA To: Bjorn Andersson , Konrad Dybcio , Conor Dooley , Rob Herring , Krzysztof Kozlowski CC: , , , , , Tengfei Fan X-Mailer: b4 0.15-dev-a66ce X-Developer-Signature: v=1; a=ed25519-sha256; t=1720537501; l=1681; i=quic_tengfan@quicinc.com; s=20240709; h=from:subject:message-id; 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The QCS9100 is a variant of the SA8775p. While the QCS9100 platform is still in the early design stage, the QCS9100 RIDE board is identical to the SA8775p RIDE board, except it mounts the QCS9100 SoC instead of the SA8775p SoC. The QCS9100 SoC DTSI is directly renamed from the SA8775p SoC DTSI, and all the compatible strings will be updated from "SA8775p" to "QCS9100". The QCS9100 device tree patches will be pushed after all the device tree bindings and device driver patches are reviewed. The final dtsi will like: https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-3-quic_tengfan@quicinc.com/ The detailed cover letter reference: https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan@quicinc.com/ Signed-off-by: Tengfei Fan --- Changes in v2: - Split huge patch series into different patch series according to subsytems - Update patch commit message prevous disscussion here: [1] v1: https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan@quicinc.com/ --- Tengfei Fan (2): dt-bindings: cache: qcom,llcc: Add QCS9100 description soc: qcom: llcc: Add llcc configuration support for the QCS9100 platform Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 ++ drivers/soc/qcom/llcc-qcom.c | 1 + 2 files changed, 3 insertions(+) --- base-commit: 0b58e108042b0ed28a71cd7edf5175999955b233 change-id: 20240709-add_qcs9100_llcc_compatible-3477559ba2e2 Best regards,