| Message ID | 20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | riscv control-flow integrity for usermode | expand |
Hello: This series was applied to riscv/linux.git (for-next) by Palmer Dabbelt <palmer@rivosinc.com>: On Tue, 01 Oct 2024 09:06:05 -0700 you wrote: > v5 for cpu assisted riscv user mode control flow integrity. > zicfiss and zicfilp [1] are ratified riscv CPU extensions. > > Changes in this version are > - rebased on v6.12-rc1 > - Fixed schema related issues in device tree file > - Fixed some of the documentation related issues in zicfilp/ss.rst > (style issues and added index) > - added `SHADOW_STACK_SET_MARKER` so that implementation can define base > of shadow stack. > - Fixed warnings on definitions added in usercfi.h when > CONFIG_RISCV_USER_CFI is not selected. > - Adopted context header based signal handling as proposed by Andy Chiu > - Added support for enabling kernel mode access to shadow stack using > FWFT [4] > > [...] Here is the summary with links: - [01/33] mm: Introduce ARCH_HAS_USER_SHADOW_STACK (no matching commit) - [02/33] mm: helper `is_shadow_stack_vma` to check shadow stack vma (no matching commit) - [03/33] riscv: Enable cbo.zero only when all harts support Zicboz https://git.kernel.org/riscv/c/1b57747e978f - [04/33] riscv: Add support for per-thread envcfg CSR values (no matching commit) - [05/33] riscv: Call riscv_user_isa_enable() only on the boot hart (no matching commit) - [06/33] riscv/Kconfig: enable HAVE_EXIT_THREAD for riscv (no matching commit) - [07/33] riscv: zicfilp / zicfiss in dt-bindings (extensions.yaml) (no matching commit) - [08/33] riscv: zicfiss / zicfilp enumeration (no matching commit) - [09/33] riscv: zicfiss / zicfilp extension csr and bit definitions (no matching commit) - [10/33] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit (no matching commit) - [11/33] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE (no matching commit) - [12/33] riscv mm: manufacture shadow stack pte (no matching commit) - [13/33] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs (no matching commit) - [14/33] riscv mmu: write protect and shadow stack (no matching commit) - [15/33] riscv/mm: Implement map_shadow_stack() syscall (no matching commit) - [16/33] riscv/shstk: If needed allocate a new shadow stack on clone (no matching commit) - [17/33] prctl: arch-agnostic prctl for shadow stack (no matching commit) - [18/33] prctl: arch-agnostic prctl for indirect branch tracking (no matching commit) - [19/33] riscv: Implements arch agnostic shadow stack prctls (no matching commit) - [20/33] riscv: Implements arch agnostic indirect branch tracking prctls (no matching commit) - [21/33] riscv/traps: Introduce software check exception (no matching commit) - [22/33] riscv: signal: abstract header saving for setup_sigcontext (no matching commit) - [23/33] riscv signal: save and restore of shadow stack for signal (no matching commit) - [24/33] riscv/kernel: update __show_regs to print shadow stack register (no matching commit) - [25/33] riscv/ptrace: riscv cfi status and state via ptrace and in core files (no matching commit) - [26/33] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe (no matching commit) - [27/33] riscv: Add Firmware Feature SBI extensions definitions (no matching commit) - [28/33] riscv: enable kernel access to shadow stack memory via FWFT sbi call (no matching commit) - [29/33] riscv: kernel command line option to opt out of user cfi (no matching commit) - [30/33] riscv: create a config for shadow stack and landing pad instr support (no matching commit) - [31/33] riscv: Documentation for landing pad / indirect branch tracking (no matching commit) - [32/33] riscv: Documentation for shadow stack on riscv (no matching commit) - [33/33] kselftest/riscv: kselftest for user mode cfi (no matching commit) You are awesome, thank you!
v5 for cpu assisted riscv user mode control flow integrity. zicfiss and zicfilp [1] are ratified riscv CPU extensions. Changes in this version are - rebased on v6.12-rc1 - Fixed schema related issues in device tree file - Fixed some of the documentation related issues in zicfilp/ss.rst (style issues and added index) - added `SHADOW_STACK_SET_MARKER` so that implementation can define base of shadow stack. - Fixed warnings on definitions added in usercfi.h when CONFIG_RISCV_USER_CFI is not selected. - Adopted context header based signal handling as proposed by Andy Chiu - Added support for enabling kernel mode access to shadow stack using FWFT [4] v4 [3] and v3 [2] are earlier versions of patch series. To get more information on kernel interactions with respect to zicfilp and zicfiss, patch series adds documentation for `zicfilp` and `zicfiss` Documentation/arch/riscv/zicfiss.rst Documentation/arch/riscv/zicfilp.rst How to test this series ======================= Toolchain --------- $ git clone git@github.com:sifive/riscv-gnu-toolchain.git -b cfi-dev $ riscv-gnu-toolchain/configure --prefix=<path-to-where-to-build> --with-arch=rv64gc_zicfilp_zicfiss --enable-linux --disable-gdb --with-extra-multilib-test="rv64gc_zicfilp_zicfiss-lp64d:-static" $ make -j$(nproc) Qemu ---- $ git clone git@github.com:deepak0414/qemu.git -b zicfilp_zicfiss_ratified_master_july11 $ cd qemu $ mkdir build $ cd build $ ../configure --target-list=riscv64-softmmu $ make -j$(nproc) Opensbi ------- $ git clone git@github.com:deepak0414/opensbi.git -b v6_cfi_spec_split_opensbi $ make CROSS_COMPILE=<your riscv toolchain> -j$(nproc) PLATFORM=generic Linux ----- Running defconfig is fine. CFI is enabled by default if the toolchain supports it. $ make ARCH=riscv CROSS_COMPILE=<path-to-cfi-riscv-gnu-toolchain>/build/bin/riscv64-unknown-linux-gnu- -j$(nproc) defconfig $ make ARCH=riscv CROSS_COMPILE=<path-to-cfi-riscv-gnu-toolchain>/build/bin/riscv64-unknown-linux-gnu- -j$(nproc) Running ------- Modify your qemu command to have: -bios <path-to-cfi-opensbi>/build/platform/generic/firmware/fw_dynamic.bin -cpu rv64,zicfilp=true,zicfiss=true,zimop=true,zcmop=true vDSO related Opens (in the flux) ================================= I am listing these opens for laying out plan and what to expect in future patch sets. And of course for the sake of discussion. Shadow stack and landing pad enabling in vDSO ---------------------------------------------- vDSO must have shadow stack and landing pad support compiled in for task to have shadow stack and landing pad support. This patch series doesn't enable that (yet). Enabling shadow stack support in vDSO should be straight forward (intend to do that in next versions of patch set). Enabling landing pad support in vDSO requires some collaboration with toolchain folks to follow a single label scheme for all object binaries. This is necessary to ensure that all indirect call-sites are setting correct label and target landing pads are decorated with same label scheme. How many vDSOs --------------- Shadow stack instructions are carved out of zimop (may be operations) and if CPU doesn't implement zimop, they're illegal instructions. Kernel could be running on a CPU which may or may not implement zimop. And thus kernel will have to carry 2 different vDSOs and expose the appropriate one depending on whether CPU implements zimop or not. [1] - https://github.com/riscv/riscv-cfi [2] - https://lore.kernel.org/lkml/20240403234054.2020347-1-debug@rivosinc.com/ [3] - https://lore.kernel.org/all/20240912231650.3740732-1-debug@rivosinc.com/ [4] - https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/src/ext-firmware-features.adoc --- changelog --------- v4 -- - rebased on 6.11-rc6 - envcfg: Converged with Samuel Holland's patches for envcfg management on per- thread basis. - vma_is_shadow_stack is renamed to is_vma_shadow_stack - picked up Mark Brown's `ARCH_HAS_USER_SHADOW_STACK` patch - signal context: using extended context management to maintain compatibility. - fixed `-Wmissing-prototypes` compiler warnings for prctl functions - Documentation fixes and amending typos. v3 -- envcfg: logic to pick up base envcfg had a bug where `ENVCFG_CBZE` could have been picked on per task basis, even though CPU didn't implement it. Fixed in this series. dt-bindings: As suggested, split into separate commit. fixed the messaging that spec is in public review arch_is_shadow_stack change: arch_is_shadow_stack changed to vma_is_shadow_stack hwprobe: zicfiss / zicfilp if present will get enumerated in hwprobe selftests: As suggested, added object and binary filenames to .gitignore Selftest binary anyways need to be compiled with cfi enabled compiler which will make sure that landing pad and shadow stack are enabled. Thus removed separate enable/disable tests. Cleaned up tests a bit. v2 -- - Using config `CONFIG_RISCV_USER_CFI`, kernel support for riscv control flow integrity for user mode programs can be compiled in the kernel. - Enabling of control flow integrity for user programs is left to user runtime - This patch series introduces arch agnostic `prctls` to enable shadow stack and indirect branch tracking. And implements them on riscv. Signed-off-by: Deepak Gupta <debug@rivosinc.com> --- Andy Chiu (1): riscv: signal: abstract header saving for setup_sigcontext Clément Léger (1): riscv: Add Firmware Feature SBI extensions definitions Deepak Gupta (26): mm: helper `is_shadow_stack_vma` to check shadow stack vma riscv/Kconfig: enable HAVE_EXIT_THREAD for riscv riscv: zicfilp / zicfiss in dt-bindings (extensions.yaml) riscv: zicfiss / zicfilp enumeration riscv: zicfiss / zicfilp extension csr and bit definitions riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE riscv mm: manufacture shadow stack pte riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs riscv mmu: write protect and shadow stack riscv/mm: Implement map_shadow_stack() syscall riscv/shstk: If needed allocate a new shadow stack on clone prctl: arch-agnostic prctl for indirect branch tracking riscv: Implements arch agnostic shadow stack prctls riscv: Implements arch agnostic indirect branch tracking prctls riscv/traps: Introduce software check exception riscv signal: save and restore of shadow stack for signal riscv/kernel: update __show_regs to print shadow stack register riscv/ptrace: riscv cfi status and state via ptrace and in core files riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe riscv: enable kernel access to shadow stack memory via FWFT sbi call riscv: kernel command line option to opt out of user cfi riscv: create a config for shadow stack and landing pad instr support riscv: Documentation for landing pad / indirect branch tracking riscv: Documentation for shadow stack on riscv kselftest/riscv: kselftest for user mode cfi Mark Brown (2): mm: Introduce ARCH_HAS_USER_SHADOW_STACK prctl: arch-agnostic prctl for shadow stack Samuel Holland (3): riscv: Enable cbo.zero only when all harts support Zicboz riscv: Add support for per-thread envcfg CSR values riscv: Call riscv_user_isa_enable() only on the boot hart Documentation/arch/riscv/index.rst | 2 + Documentation/arch/riscv/zicfilp.rst | 115 +++++ Documentation/arch/riscv/zicfiss.rst | 176 +++++++ .../devicetree/bindings/riscv/extensions.yaml | 14 + arch/riscv/Kconfig | 20 + arch/riscv/include/asm/asm-prototypes.h | 1 + arch/riscv/include/asm/cpufeature.h | 15 +- arch/riscv/include/asm/csr.h | 16 + arch/riscv/include/asm/entry-common.h | 2 + arch/riscv/include/asm/hwcap.h | 2 + arch/riscv/include/asm/mman.h | 24 + arch/riscv/include/asm/pgtable.h | 30 +- arch/riscv/include/asm/processor.h | 2 + arch/riscv/include/asm/sbi.h | 27 ++ arch/riscv/include/asm/switch_to.h | 8 + arch/riscv/include/asm/thread_info.h | 4 + arch/riscv/include/asm/usercfi.h | 89 ++++ arch/riscv/include/uapi/asm/hwprobe.h | 2 + arch/riscv/include/uapi/asm/ptrace.h | 22 + arch/riscv/include/uapi/asm/sigcontext.h | 1 + arch/riscv/kernel/Makefile | 2 + arch/riscv/kernel/asm-offsets.c | 8 + arch/riscv/kernel/cpufeature.c | 13 +- arch/riscv/kernel/entry.S | 31 +- arch/riscv/kernel/head.S | 12 + arch/riscv/kernel/process.c | 31 +- arch/riscv/kernel/ptrace.c | 83 ++++ arch/riscv/kernel/signal.c | 140 +++++- arch/riscv/kernel/smpboot.c | 2 - arch/riscv/kernel/suspend.c | 4 +- arch/riscv/kernel/sys_hwprobe.c | 2 + arch/riscv/kernel/sys_riscv.c | 10 + arch/riscv/kernel/traps.c | 42 ++ arch/riscv/kernel/usercfi.c | 526 +++++++++++++++++++++ arch/riscv/mm/init.c | 2 +- arch/riscv/mm/pgtable.c | 17 + arch/x86/Kconfig | 1 + fs/proc/task_mmu.c | 2 +- include/linux/cpu.h | 4 + include/linux/mm.h | 5 +- include/uapi/asm-generic/mman.h | 4 + include/uapi/linux/elf.h | 1 + include/uapi/linux/prctl.h | 48 ++ kernel/sys.c | 60 +++ mm/Kconfig | 6 + mm/gup.c | 2 +- mm/mmap.c | 1 + mm/vma.h | 10 +- tools/testing/selftests/riscv/Makefile | 2 +- tools/testing/selftests/riscv/cfi/.gitignore | 3 + tools/testing/selftests/riscv/cfi/Makefile | 10 + tools/testing/selftests/riscv/cfi/cfi_rv_test.h | 83 ++++ tools/testing/selftests/riscv/cfi/riscv_cfi_test.c | 82 ++++ tools/testing/selftests/riscv/cfi/shadowstack.c | 362 ++++++++++++++ tools/testing/selftests/riscv/cfi/shadowstack.h | 37 ++ 55 files changed, 2178 insertions(+), 42 deletions(-) --- base-commit: 9852d85ec9d492ebef56dc5f229416c925758edc change-id: 20240930-v5_user_cfi_series-3dc332f8f5b2 -- - debug