Message ID | 20241119-pmu_event_info-v1-0-a4f9691421f8@rivosinc.com (mailing list archive) |
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Tue, 19 Nov 2024 12:30:48 -0800 (PST) From: Atish Patra <atishp@rivosinc.com> Subject: [PATCH 0/8] Add SBI v3.0 PMU enhancements Date: Tue, 19 Nov 2024 12:29:48 -0800 Message-Id: <20241119-pmu_event_info-v1-0-a4f9691421f8@rivosinc.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAD31PGcC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDIxNDA0ML3YLc0vjUstS8kvjMvLR8XUsLs1Qjw+RUs6QUYyWgpoKi1LTMCrC B0bG1tQC3PSxyYAAAAA== To: Anup Patel <anup@brainfault.org>, Will Deacon <will@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Mayuresh Chitale <mchitale@ventanamicro.com> Cc: linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Palmer Dabbelt <palmer@rivosinc.com>, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, Atish Patra <atishp@rivosinc.com> X-Mailer: b4 0.15-dev-13183 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241119_123050_474143_89647B7F X-CRM114-Status: GOOD ( 12.02 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: <linux-riscv.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-riscv>, <mailto:linux-riscv-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/linux-riscv/> List-Post: <mailto:linux-riscv@lists.infradead.org> List-Help: <mailto:linux-riscv-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-riscv>, <mailto:linux-riscv-request@lists.infradead.org?subject=subscribe> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org |
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Add SBI v3.0 PMU enhancements
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expand
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SBI v3.0 specification[1] added two new improvements to the PMU chaper. 1. Added an additional get_event_info function to query event availablity in bulk instead of individual SBI calls for each event. This helps in improving the boot time. 2. Raw event width allowed by the platform is widened to have 56 bits with RAW event v2 as per new clarification in the priv ISA[2]. Apart from implementing these new features, this series adds a fix in firmware event mapping and updates the kvm SBI implementation to SBI v3.0. The opensbi patches can be found at [3]. This series can be found at [4]. [1] https://github.com/riscv-non-isa/riscv-sbi-doc/releases/download/vv3.0-rc2/riscv-sbi.pdf [2] https://github.com/riscv/riscv-isa-manual/issues/1578 [3] https://github.com/atishp04/opensbi/tree/b4/pmu_event_info [4] https://github.com/atishp04/linux/tree/b4/pmu_event_info Signed-off-by: Atish Patra <atishp@rivosinc.com> --- Atish Patra (8): drivers/perf: riscv: Add SBI v3.0 flag drivers/perf: riscv: Fix Platform firmware event data drivers/perf: riscv: Add raw event v2 support RISC-V: KVM: Add support for Raw event v2 drivers/perf: riscv: Implement PMU event info function drivers/perf: riscv: Export PMU event info function RISC-V: KVM: Implement get event info function RISC-V: KVM: Upgrade the supported SBI version to 3.0 arch/riscv/include/asm/kvm_vcpu_pmu.h | 3 + arch/riscv/include/asm/kvm_vcpu_sbi.h | 2 +- arch/riscv/include/asm/sbi.h | 12 +++ arch/riscv/kvm/vcpu_pmu.c | 71 +++++++++++++ arch/riscv/kvm/vcpu_sbi_pmu.c | 3 + drivers/perf/riscv_pmu_sbi.c | 184 +++++++++++++++++++++++++--------- include/linux/perf/riscv_pmu.h | 2 + 7 files changed, 228 insertions(+), 49 deletions(-) --- base-commit: acb481ddd977ab669128bab61024d05e7dc1654f change-id: 20241018-pmu_event_info-986e21ce6bd3 -- Regards, Atish patra