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Wed, 26 Feb 2025 00:42:04 +0000 (UTC) From: Yixun Lan Subject: [PATCH v7 0/4] riscv: spacemit: add gpio support for K1 SoC Date: Wed, 26 Feb 2025 08:41:16 +0800 Message-Id: <20250226-03-k1-gpio-v7-0-be489c4a609b@gentoo.org> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIACxjvmcC/2XQTU7DMBAF4KtUXmNkj/+z4h6IRWyP04hSFyeNQ FXvjpMKSJTlWPqe38yNDFh6HEhzuJGCUz/0+VwH83Qg4dieO6R9rDMBBpJZsJQJ+s5pd+kz1dw nB8kxAYFUcCmY+q8l7PXtMRf8vNbM8fFIfDsgDfnjox+bg4gGomaiTa2Bmq0YR8eMRoyaI1OCC +EwWbLu0hxqE8WAm0eHMr8PNOVrCXg6UaustW0E7mLbTILMPY79MObyvew48aXIso5jcr3OxCm jmhlAjxhaZC8dnsecn3PplpwJ/iyvH2wsVAtWSpkiAA9xZ8XKgtpYMVvjvfFS8qhhZ+WvrScCv rF1Ayq15MGpwLiTO6v+7Xy0tVVLZy0wCDRem53VKwtiY3W10QPKNiImHjb2fr//AGAAuDhZAgA A X-Change-ID: 20240828-03-k1-gpio-61bf92f9032c To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Conor Dooley , Paul Walmsley , Palmer Dabbelt X-Mailer: b4 0.15-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=4477; i=dlan@gentoo.org; h=from:subject:message-id; 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a=openpgp; fpr=50B03A1A5CBCD33576EF8CD7920C0DBCAABEFD55 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250225_164214_402178_B191B8EC X-CRM114-Status: GOOD ( 13.93 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Meng Zhang , Yixun Lan , Alex Elder , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Jesse Taube , Yangyu Chen , Inochi Amaoto , Jisheng Zhang , linux-riscv@lists.infradead.org, spacemit@lists.linux.dev Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The gpio controller of K1 support basic GPIO functions, which capable of enabling as input, output. It can also be used as GPIO interrupt which able to detect rising edge, falling edge, or both. There are four GPIO ports, each consisting of 32 pins and has indepedent register sets, while still sharing IRQ line and clocks. The GPIO controller request the clock source from APBC block, In this series, I haven't added the clock support, but plan to fix it after clock driver is merged. Due to first three GPIO ports has interleave register settings, some resources (IRQ, clock) are shared by all pins. The GPIO docs of K1 SoC can be found here, chapter 16.4 GPIO [1] Note, this patch is rebased to v6.14-rc1. This patch series has been tested on Bananapi-F3 board, with following GPIO cases passed: 1) gpio input 2) gpio output - set to high, low 3) gpio interrupt - rising trigger, falling trigger, both edge trigger This version should resolve DT related concern in V4, and register each bank as indepedent gpio chip in driver, no more sub children gpio DT node needed. One problem is still not resolved, the interrupt cells parsing isn't correct. but it works if request gpio irq via gpiod_get() + gpiod_to_irq() Link: https://developer.spacemit.com/documentation?token=Rn9Kw3iFHirAMgkIpTAcV2Arnkf [1] Link: https://lore.kernel.org/all/20240730-k1-01-basic-dt-v5-0-98263aae83be@gentoo.org [2] Link: https://lore.kernel.org/all/20241016-02-k1-pinctrl-v5-0-03d395222e4f@gentoo.org/ [3] Link: https://lore.kernel.org/all/20250218-gpio-ranges-fourcell-v1-0-b1f3db6c8036@linaro.org [4] Link: https://lore.kernel.org/all/20250225-gpio-ranges-fourcell-v3-0-860382ba4713@linaro.org [5] Signed-off-by: Yixun Lan --- Changes in v7: - dt-binding: fix 80 column, drop unneeded dependencies - tested with patch v3 of "gpiolib: of: Handle threecell gpios" [5] - collect review tags - Link to v6: https://lore.kernel.org/r/20250223-03-k1-gpio-v6-0-db2e4adeef1c@gentoo.org Changes in v6: - rebase to threecell gpio patch which proposed by LinusW at [4], drop unneeded *xlate(), *add_pin_range() function - add SPACEMIT prefix to macro - adjust register comments - drop 'index' member, instead calculate from offset - add IRQCHIP_SKIP_SET_WAKE as gpio doesn't support irq wake up - drop #ifdef CONFIG_OF_GPIO - move interrupt mask disabling/enabling into irq_*mask() - Link to v5: https://lore.kernel.org/r/20250217-03-k1-gpio-v5-0-2863ec3e7b67@gentoo.org Changes in v5: - export add_pin_range() from gpio core, support to add custom version - change to 3 gpio cells, model to , , - fold children DT nodes into parent - Link to v4: https://lore.kernel.org/r/20250121-03-k1-gpio-v4-0-4641c95c0194@gentoo.org Changes in v4: - gpio: re-construct gpio as four independent ports, also leverage gpio mmio API - gpio interrupt: convert to generic gpio irqchip - Link to v3: https://lore.kernel.org/r/20241225-03-k1-gpio-v3-0-27bb7b441d62@gentoo.org Changes in v3: - dt: drop ranges, interrupt-names property - Link to v2: https://lore.kernel.org/r/20241219-03-k1-gpio-v2-0-28444fd221cd@gentoo.org Changes in v2: - address dt-bindings comments, simplify example - rebase to 6.13-rc3 - Link to v1: https://lore.kernel.org/r/20240904-03-k1-gpio-v1-0-6072ebeecae0@gentoo.org --- Yixun Lan (4): dt-bindings: gpio: spacemit: add support for K1 SoC gpio: spacemit: add support for K1 SoC riscv: dts: spacemit: add gpio support for K1 SoC riscv: dts: spacemit: add gpio LED for system heartbeat .../devicetree/bindings/gpio/spacemit,k1-gpio.yaml | 79 ++++++ arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts | 11 + arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 3 + arch/riscv/boot/dts/spacemit/k1.dtsi | 15 ++ drivers/gpio/Kconfig | 8 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-spacemit-k1.c | 277 +++++++++++++++++++++ 7 files changed, 394 insertions(+) --- base-commit: 3d72d603afa72082501e9076eed61e0531339ef8 change-id: 20240828-03-k1-gpio-61bf92f9032c prerequisite-change-id: 20250217-gpio-ranges-fourcell-85888ad219da:v3 prerequisite-patch-id: 9d4c8b05cc56d25bfb93f3b06420ba6e93340d31 prerequisite-patch-id: 7949035abd05ec02a9426bb17819d9108e66e0d7 Best regards,