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Wed, 26 Feb 2025 15:42:56 -0800 (PST) From: Inochi Amaoto To: Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Palmer Dabbelt , Albert Ou , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Guo Ren Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, sophgo@lists.linux.dev, linux-riscv@lists.infradead.org, Yixun Lan , Longbin Li Subject: [PATCH v2 0/5] reset: introduce generic reset-simple controller Date: Thu, 27 Feb 2025 07:42:28 +0800 Message-ID: <20250226234234.125305-1-inochiama@gmail.com> X-Mailer: git-send-email 2.48.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250226_154258_924038_0203B1C1 X-CRM114-Status: GOOD ( 15.04 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Many SoC have a simple reset controller with toggling bit to perform assert/deassert. It is annoyed to add device id to the reset-simple driver for each device when coming a new SoC. This patch series introduce a generic binding to collect devices match the following requirement: - There is a single, contiguous range of 32-bit registers. - All bits in each register directly control a reset line. - There are no self-deasserting resets. - There are no timing requirements. - The bits are exclusively resets, nothing else. - All bits behave the same, so all reset bits are either active-high or all are active-low. - The bits can be read back, but the read status may be active-low independently from the writes. If the device follows the requirement, it can set the compatiable and reuse the provided "reset-simple" as base compatiable without changing the reset-simple driver with unnecessary new device id. Add a generic reset-simple controller, and migrate the Sophgo SG2042 reset controller as an example. Change from v1: - https://lore.kernel.org/all/20250213020900.745551-1-inochiama@gmail.com/ 1. fix title to mark it introduce new generic device for reset-simple driver 2. add "active-low" property support for the generic reset-simple device. 3. patch 1: update the binding description to illustrate the suitable scenarios to use this binding. Inochi Amaoto (5): dt-bindings: reset: add generic bit reset controller reset: simple: Add active-low property support. reset: simple: add support generic reset-simple device dt-bindings: reset: simple: migrate sophgo sg2042 reset controller riscv: dts: sg2042: Adapt reset generator for new binding .../bindings/reset/reset-simple.yaml | 66 +++++++++++++++++++ .../bindings/reset/sophgo,sg2042-reset.yaml | 35 ---------- arch/riscv/boot/dts/sophgo/sg2042.dtsi | 3 +- drivers/reset/reset-simple.c | 7 ++ 4 files changed, 75 insertions(+), 36 deletions(-) create mode 100644 Documentation/devicetree/bindings/reset/reset-simple.yaml delete mode 100644 Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml --- 2.48.1