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Wed, 18 Oct 2023 23:17:44 +0000 Received: from IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::d050:882f:a8a7:8263]) by IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::d050:882f:a8a7:8263%5]) with mapi id 15.20.6907.021; Wed, 18 Oct 2023 23:17:44 +0000 From: Inochi Amaoto To: Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Chao Wei , Chen Wang , Albert Ou , Daniel Lezcano , Anup Patel Cc: Jisheng Zhang , Inochi Amaoto , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v4 0/7] Add Huashan Pi board support Date: Thu, 19 Oct 2023 07:18:00 +0800 Message-ID: X-Mailer: git-send-email 2.42.0 X-TMN: [Y3YjBzVCFMw78wGdKqQMphN2eLy9DK4LEq8kVZmYKyA=] X-ClientProxiedBy: TYCP286CA0044.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:29d::17) To IA1PR20MB4953.namprd20.prod.outlook.com (2603:10b6:208:3af::19) X-Microsoft-Original-Message-ID: <20231018231803.28262-1-inochiama@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR20MB4953:EE_|CO6PR20MB3649:EE_ X-MS-Office365-Filtering-Correlation-Id: 991da175-f9cc-4805-65a5-08dbd0306ee2 X-Microsoft-Antispam: BCL:0; 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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Huashan Pi board is an embedded development platform based on the CV1812H chip. Add minimal device tree files for this board. Currently, it can boot to a basic shell. NOTE: this series is based on the Jisheng's Milk-V Duo patch. Link: https://en.sophgo.com/product/introduce/huashan.html Link: https://en.sophgo.com/product/introduce/cv181xH.html Link: https://lore.kernel.org/linux-riscv/20231006121449.721-1-jszhang@kernel.org/ Changed from v3: 1. merge the patch 4 and 5 of v2 to preserve bisectability. Changed from v2: 1. use dt override to save code. 2. code cleanup. Changed from v1: 1. split the patch into several patch and refactor them. Inochi Amaoto (7): dt-bindings: interrupt-controller: Add SOPHGO CV1812H plic dt-bindings: timer: Add SOPHGO CV1812H clint dt-bindings: riscv: Add SOPHGO Huashan Pi board compatibles riscv: dts: sophgo: Separate compatible specific for CV1800B soc riscv: dts: sophgo: cv18xx: Add gpio devices riscv: dts: sophgo: add initial CV1812H SoC device tree riscv: dts: sophgo: add Huashan Pi board device tree .../sifive,plic-1.0.0.yaml | 1 + .../devicetree/bindings/riscv/sophgo.yaml | 4 + .../bindings/timer/sifive,clint.yaml | 1 + arch/riscv/boot/dts/sophgo/Makefile | 1 + arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 119 +---------- .../boot/dts/sophgo/cv1812h-huashan-pi.dts | 48 +++++ arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 24 +++ arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 193 ++++++++++++++++++ 8 files changed, 279 insertions(+), 112 deletions(-) create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h.dtsi create mode 100644 arch/riscv/boot/dts/sophgo/cv18xx.dtsi --- 2.42.0