| Message ID | IA1PR20MB4953DC78BB0FE0C57EA94F91BBB32@IA1PR20MB4953.namprd20.prod.outlook.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | riscv: sophgo: Add pinctrl support for CV1800 series SoC | expand |
On Fri, Aug 2, 2024 at 2:34 AM Inochi Amaoto <inochiama@outlook.com> wrote: > Add basic pinctrl driver for Sophgo CV1800 series SoCs. > This patch series aims to replace the previous patch from Jisheng [1]. > Since the pinctrl of cv1800 has nested mux and its pin definination > is discrete, it is not suitable to use "pinctrl-single" to cover the > pinctrl device. > > This patch require another patch [2] that provides standard attribute > "input-schmitt-microvolt" > > Note: As current documentation is not enough to guess the pin > configuration of Huashan Pi, only the pinctrl node is added. > > [1] https://lore.kernel.org/linux-riscv/20231113005702.2467-1-jszhang@kernel.org/ > [2] https://lore.kernel.org/all/IA1PR20MB495346246245074234D337A6BBAC2@IA1PR20MB4953.namprd20.prod.outlook.com/ > > Changed from v3: > 1. binding: drop unnecessary type > 2. binding: use right ref for pin node. > 3. binding: remove mixed spaces and tabs. This v4 looks good to me and has necessary ACKs. It contains device tree patches which I am icky to merge but I can merge the rest and give you an immutable branch in the pinctrl tree that the ARM SoC maintainers can pull in to merge the device trees, does this work for you? Yours, Linus Walleij
On Fri, Aug 23, 2024 at 05:44:17PM GMT, Linus Walleij wrote: > On Fri, Aug 2, 2024 at 2:34 AM Inochi Amaoto <inochiama@outlook.com> wrote: > > > Add basic pinctrl driver for Sophgo CV1800 series SoCs. > > This patch series aims to replace the previous patch from Jisheng [1]. > > Since the pinctrl of cv1800 has nested mux and its pin definination > > is discrete, it is not suitable to use "pinctrl-single" to cover the > > pinctrl device. > > > > This patch require another patch [2] that provides standard attribute > > "input-schmitt-microvolt" > > > > Note: As current documentation is not enough to guess the pin > > configuration of Huashan Pi, only the pinctrl node is added. > > > > [1] https://lore.kernel.org/linux-riscv/20231113005702.2467-1-jszhang@kernel.org/ > > [2] https://lore.kernel.org/all/IA1PR20MB495346246245074234D337A6BBAC2@IA1PR20MB4953.namprd20.prod.outlook.com/ > > > > Changed from v3: > > 1. binding: drop unnecessary type > > 2. binding: use right ref for pin node. > > 3. binding: remove mixed spaces and tabs. > > This v4 looks good to me and has necessary ACKs. > > It contains device tree patches which I am icky to merge but > I can merge the rest and give you an immutable branch in the > pinctrl tree that the ARM SoC maintainers can pull in to > merge the device trees, does this work for you? > > Yours, > Linus Walleij Hi, Linus It is OK for me, Thanks for taking it. Regard, Inochi
On Sat, Aug 24, 2024 at 1:26 PM Inochi Amaoto <inochiama@outlook.com> wrote: > On Fri, Aug 23, 2024 at 05:44:17PM GMT, Linus Walleij wrote: > > On Fri, Aug 2, 2024 at 2:34 AM Inochi Amaoto <inochiama@outlook.com> wrote: > > > > > Add basic pinctrl driver for Sophgo CV1800 series SoCs. > > > This patch series aims to replace the previous patch from Jisheng [1]. > > > Since the pinctrl of cv1800 has nested mux and its pin definination > > > is discrete, it is not suitable to use "pinctrl-single" to cover the > > > pinctrl device. > > > > > > This patch require another patch [2] that provides standard attribute > > > "input-schmitt-microvolt" > > > > > > Note: As current documentation is not enough to guess the pin > > > configuration of Huashan Pi, only the pinctrl node is added. > > > > > > [1] https://lore.kernel.org/linux-riscv/20231113005702.2467-1-jszhang@kernel.org/ > > > [2] https://lore.kernel.org/all/IA1PR20MB495346246245074234D337A6BBAC2@IA1PR20MB4953.namprd20.prod.outlook.com/ > > > > > > Changed from v3: > > > 1. binding: drop unnecessary type > > > 2. binding: use right ref for pin node. > > > 3. binding: remove mixed spaces and tabs. > > > > This v4 looks good to me and has necessary ACKs. > > > > It contains device tree patches which I am icky to merge but > > I can merge the rest and give you an immutable branch in the > > pinctrl tree that the ARM SoC maintainers can pull in to > > merge the device trees, does this work for you? > > > > Yours, > > Linus Walleij > > Hi, Linus > > It is OK for me, Thanks for taking it. OK! The pinctrl base patches are merged to this immutable branch: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/log/?h=ib-sophgo-pinctrl The SoC tree can pull this in to get the binding files. I have then merged this into the main pinctrl "devel" branch. Yours, Linus Walleij
On Fri, 2 Aug 2024 08:33:58 +0800, Inochi Amaoto wrote: > Add basic pinctrl driver for Sophgo CV1800 series SoCs. > This patch series aims to replace the previous patch from Jisheng [1]. > Since the pinctrl of cv1800 has nested mux and its pin definination > is discrete, it is not suitable to use "pinctrl-single" to cover the > pinctrl device. > > This patch require another patch [2] that provides standard attribute > "input-schmitt-microvolt" > > [...] Applied to for-next, thanks! [6/7] riscv: dts: sophgo: cv1800b: add pinctrl support https://github.com/sophgo/linux/commit/1728c7e408c6e5ef1c6f3a2c7f75bd20139c2e13 [7/7] riscv: dts: sophgo: cv1812h: add pinctrl support https://github.com/sophgo/linux/commit/2926c05f9cb7b5bb0374fb7a53bffd65937a454f Thanks, Inochi
On Thu, Aug 29, 2024 at 01:08:41PM GMT, Inochi Amaoto wrote: > On Fri, 2 Aug 2024 08:33:58 +0800, Inochi Amaoto wrote: > > Add basic pinctrl driver for Sophgo CV1800 series SoCs. > > This patch series aims to replace the previous patch from Jisheng [1]. > > Since the pinctrl of cv1800 has nested mux and its pin definination > > is discrete, it is not suitable to use "pinctrl-single" to cover the > > pinctrl device. > > > > This patch require another patch [2] that provides standard attribute > > "input-schmitt-microvolt" > > > > [...] > > Applied to for-next, thanks! > > [6/7] riscv: dts: sophgo: cv1800b: add pinctrl support > https://github.com/sophgo/linux/commit/1728c7e408c6e5ef1c6f3a2c7f75bd20139c2e13 > [7/7] riscv: dts: sophgo: cv1812h: add pinctrl support > https://github.com/sophgo/linux/commit/2926c05f9cb7b5bb0374fb7a53bffd65937a454f > > Thanks, > Inochi > Drop the apply and favor the v6 version: https://lore.kernel.org/all/IA1PR20MB495301A1A08224486DD0239BBB9A2@IA1PR20MB4953.namprd20.prod.outlook.com/T/#m4acc4e2a9652cb3f5a3ce54deaff52a827b80649 Regards, Inochi