Show patches with: Submitter = Xingyu Wu       |   189 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[v5,2/2] riscv: dts: starfive: visionfive-2: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5G… Add notifier for PLL0 clock and set it 1.5GHz on - 1 - 13-1 2024-05-07 Xingyu Wu Superseded
[v5,1/2] clk: starfive: jh7110-sys: Add notifier for PLL0 clock Add notifier for PLL0 clock and set it 1.5GHz on - 1 - 13-1 2024-05-07 Xingyu Wu Superseded
[v4,2/2] riscv: dts: starfive: visionfive-2: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5G… Add notifier for PLL0 clock and set it 1.5GHz on - - - 13-- 2024-04-10 Xingyu Wu conchuod Superseded
[v4,1/2] clk: starfive: jh7110-sys: Add notifier for PLL clock Add notifier for PLL0 clock and set it 1.5GHz on - - - 13-- 2024-04-10 Xingyu Wu Superseded
[v3] clk: starfive: pll: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz [v3] clk: starfive: pll: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz - 1 - 13-- 2024-04-02 Xingyu Wu Handled Elsewhere
[v8,3/3] riscv: dts: jh7110: starfive: Add timer node Add timer driver for StarFive JH7110 RISC-V SoC - 2 - 13-- 2023-12-19 Xingyu Wu conchuod Handled Elsewhere
[v8,2/3] clocksource: Add JH7110 timer driver Add timer driver for StarFive JH7110 RISC-V SoC - - - 121- 2023-12-19 Xingyu Wu Handled Elsewhere
[v8,1/3] dt-bindings: timer: Add timer for StarFive JH7110 SoC Add timer driver for StarFive JH7110 RISC-V SoC - 1 - 121- 2023-12-19 Xingyu Wu Handled Elsewhere
[v7,3/3] riscv: dts: jh7110: starfive: Add timer node Add timer driver for StarFive JH7110 RISC-V SoC - 2 - 121- 2023-10-19 Xingyu Wu conchuod Changes Requested
[v7,2/3] clocksource: Add JH7110 timer driver Add timer driver for StarFive JH7110 RISC-V SoC - - - 112- 2023-10-19 Xingyu Wu Handled Elsewhere
[v7,1/3] dt-bindings: timer: Add timer for StarFive JH7110 SoC Add timer driver for StarFive JH7110 RISC-V SoC - 1 - 112- 2023-10-19 Xingyu Wu Handled Elsewhere
[v6,3/3] riscv: dts: jh7110: starfive: Add timer node Add timer driver for StarFive JH7110 RISC-V SoC - 1 - 131- 2023-10-12 Xingyu Wu conchuod Superseded
[v6,2/3] clocksource: Add JH7110 timer driver Add timer driver for StarFive JH7110 RISC-V SoC - - - 122- 2023-10-12 Xingyu Wu Superseded
[v6,1/3] dt-bindings: timer: Add timer for StarFive JH7110 SoC Add timer driver for StarFive JH7110 RISC-V SoC - 1 - 122- 2023-10-12 Xingyu Wu Superseded
[v5,3/3] riscv: dts: jh7110: starfive: Add timer node Add timer driver for StarFive JH7110 RISC-V SoC - 2 - 16-- 2023-09-07 Xingyu Wu conchuod Superseded
[v5,2/3] clocksource: Add JH7110 timer driver Add timer driver for StarFive JH7110 RISC-V SoC - - - 151- 2023-09-07 Xingyu Wu conchuod Superseded
[v5,1/3] dt-bindings: timer: Add timer for StarFive JH7110 SoC Add timer driver for StarFive JH7110 RISC-V SoC - 1 - 151- 2023-09-07 Xingyu Wu conchuod Superseded
[v2,5/5] riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1 Add I2S support for the StarFive JH7110 SoC - 1 - --1 2023-08-21 Xingyu Wu conchuod Accepted
[v2,4/5] riscv: dts: starfive: pinfunc: Fix the pins name of I2STX1 Add I2S support for the StarFive JH7110 SoC 1 1 - --1 2023-08-21 Xingyu Wu conchuod Accepted
[v2,3/5] ASoC: dwc: i2s: Add StarFive JH7110 SoC support Add I2S support for the StarFive JH7110 SoC - - - --1 2023-08-21 Xingyu Wu Handled Elsewhere
[v2,2/5] ASoC: dwc: Use ops to get platform data Add I2S support for the StarFive JH7110 SoC - - - --1 2023-08-21 Xingyu Wu Handled Elsewhere
[v2,1/5] ASoC: dt-bindings: snps,designware-i2s: Add StarFive JH7110 SoC support Add I2S support for the StarFive JH7110 SoC - 1 - --1 2023-08-21 Xingyu Wu Handled Elsewhere
[v4,3/3] riscv: dts: jh7110: starfive: Add timer node Add timer driver for StarFive JH7110 RISC-V SoC - 1 - 16-- 2023-08-14 Xingyu Wu conchuod Superseded
[v4,2/3] clocksource: Add JH7110 timer driver Add timer driver for StarFive JH7110 RISC-V SoC - - - 151- 2023-08-14 Xingyu Wu Superseded
[v4,1/3] dt-bindings: timer: Add timer for StarFive JH7110 SoC Add timer driver for StarFive JH7110 RISC-V SoC - 1 - 151- 2023-08-14 Xingyu Wu Superseded
[v1,5/5] riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1 Add I2S support for the StarFive JH7110 SoC - - - --1 2023-08-02 Xingyu Wu conchuod Superseded
[v1,4/5] riscv: dts: starfive: pinfunc: Fix the pins name of I2STX1 Add I2S support for the StarFive JH7110 SoC - - - --1 2023-08-02 Xingyu Wu conchuod Superseded
[v1,3/5] ASoC: dwc: i2s: Add StarFive JH7110 SoC support Add I2S support for the StarFive JH7110 SoC - - - --1 2023-08-02 Xingyu Wu Superseded
[v1,2/5] ASoC: dt-bindings: snps,designware-i2s: Add StarFive JH7110 SoC support Add I2S support for the StarFive JH7110 SoC - - - --1 2023-08-02 Xingyu Wu Superseded
[v1,1/5] ASoC: dwc: Use ops to get platform data Add I2S support for the StarFive JH7110 SoC - - - --1 2023-08-02 Xingyu Wu Superseded
[v1] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support [v1] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support 1 2 - 13-3 2023-07-24 Xingyu Wu Handled Elsewhere
[v7,7/7] riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - 16-- 2023-07-17 Xingyu Wu conchuod Accepted
[v7,6/7] riscv: dts: starfive: jh7110: Add syscon nodes Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - 16-- 2023-07-17 Xingyu Wu conchuod Accepted
[v7,5/7] clk: starfive: jh7110-sys: Add PLL clocks source from DTS Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - 16-- 2023-07-17 Xingyu Wu conchuod Handled Elsewhere
[v7,4/7] clk: starfive: Add StarFive JH7110 PLL clock driver Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - 151- 2023-07-17 Xingyu Wu conchuod Handled Elsewhere
[v7,3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - 15-1 2023-07-17 Xingyu Wu conchuod Handled Elsewhere
[v7,2/7] dt-bindings: soc: starfive: Add StarFive syscon module Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - 16-- 2023-07-17 Xingyu Wu conchuod Handled Elsewhere
[v7,1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Add PLL clocks driver and syscon for StarFive JH7110 SoC - 3 - 151- 2023-07-17 Xingyu Wu conchuod Handled Elsewhere
[v8,9/9] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - 16-- 2023-07-13 Xingyu Wu conchuod Accepted
[v8,8/9] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - 16-- 2023-07-13 Xingyu Wu conchuod Accepted
[v8,7/9] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - 16-- 2023-07-13 Xingyu Wu conchuod Handled Elsewhere
[v8,6/9] clk: starfive: Add StarFive JH7110 Video-Output clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - 151- 2023-07-13 Xingyu Wu conchuod Handled Elsewhere
[v8,5/9] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - 151- 2023-07-13 Xingyu Wu conchuod Handled Elsewhere
[v8,4/9] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - 151- 2023-07-13 Xingyu Wu conchuod Handled Elsewhere
[v8,3/9] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - 151- 2023-07-13 Xingyu Wu conchuod Handled Elsewhere
[v8,2/9] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 1 - 151- 2023-07-13 Xingyu Wu conchuod Handled Elsewhere
[v8,1/9] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 1 2 - 151- 2023-07-13 Xingyu Wu conchuod Handled Elsewhere
[v7,9/9] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - 16-- 2023-07-12 Xingyu Wu conchuod Superseded
[v7,8/9] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - 16-- 2023-07-12 Xingyu Wu conchuod Superseded
[v7,7/9] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - 16-- 2023-07-12 Xingyu Wu Superseded
[v7,6/9] clk: starfive: Add StarFive JH7110 Video-Output clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - 151- 2023-07-12 Xingyu Wu Superseded
[v7,5/9] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - 151- 2023-07-12 Xingyu Wu Superseded
[v7,4/9] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - 151- 2023-07-12 Xingyu Wu Superseded
[v7,3/9] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - 151- 2023-07-12 Xingyu Wu Superseded
[v7,2/9] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - 151- 2023-07-12 Xingyu Wu Superseded
[v7,1/9] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 2 - 151- 2023-07-12 Xingyu Wu Superseded
[RESEND,v6,7/7] riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - 16-- 2023-07-04 Xingyu Wu conchuod Superseded
[RESEND,v6,6/7] riscv: dts: starfive: jh7110: Add syscon nodes Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - 16-- 2023-07-04 Xingyu Wu conchuod Superseded
[RESEND,v6,5/7] clk: starfive: jh7110-sys: Add PLL clocks source from DTS Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - 16-- 2023-07-04 Xingyu Wu conchuod Superseded
[RESEND,v6,4/7] clk: starfive: Add StarFive JH7110 PLL clock driver Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - 151- 2023-07-04 Xingyu Wu conchuod Superseded
[RESEND,v6,3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - 15-1 2023-07-04 Xingyu Wu conchuod Superseded
[RESEND,v6,2/7] dt-bindings: soc: starfive: Add StarFive syscon module Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - 16-- 2023-07-04 Xingyu Wu conchuod Superseded
[RESEND,v6,1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - 151- 2023-07-04 Xingyu Wu conchuod Superseded
[v6,7/7] riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - 16-- 2023-07-04 Xingyu Wu Superseded
[v6,6/7] riscv: dts: starfive: jh7110: Add syscon nodes Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - 16-- 2023-07-04 Xingyu Wu Superseded
[v6,5/7] clk: starfive: jh7110-sys: Add PLL clocks source from DTS Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - 16-- 2023-07-04 Xingyu Wu Superseded
[v6,4/7] clk: starfive: Add StarFive JH7110 PLL clock driver Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - 151- 2023-07-04 Xingyu Wu Superseded
[v6,3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - 15-1 2023-07-04 Xingyu Wu Superseded
[v6,2/7] dt-bindings: soc: starfive: Add StarFive syscon module Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - 16-- 2023-07-04 Xingyu Wu Superseded
[v6,1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - 151- 2023-07-04 Xingyu Wu Superseded
[v3,3/3] riscv: dts: jh7110: starfive: Add timer node Add timer driver for StarFive JH7110 RISC-V SoC - - - 16-- 2023-06-27 Xingyu Wu conchuod Superseded
[v3,2/3] clocksource: Add JH7110 timer driver Add timer driver for StarFive JH7110 RISC-V SoC - - - 151- 2023-06-27 Xingyu Wu Superseded
[v3,1/3] dt-bindings: timer: Add timer for StarFive JH7110 SoC Add timer driver for StarFive JH7110 RISC-V SoC - 1 - 151- 2023-06-27 Xingyu Wu Superseded
[v5,7/7] riscv: dts: starfive: jh7110: Add PLL clock source in SYSCRG node Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - 16-- 2023-06-13 Xingyu Wu Superseded
[v5,6/7] riscv: dts: starfive: jh7110: Add syscon nodes Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - 16-- 2023-06-13 Xingyu Wu Superseded
[v5,5/7] clk: starfive: jh7110-sys: Add PLL clocks source from DTS Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - 16-- 2023-06-13 Xingyu Wu Superseded
[v5,4/7] clk: starfive: Add StarFive JH7110 PLL clock driver Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - 151- 2023-06-13 Xingyu Wu Superseded
[v5,3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - 16-- 2023-06-13 Xingyu Wu Superseded
[v5,2/7] dt-bindings: soc: starfive: Add StarFive syscon module Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - 16-- 2023-06-13 Xingyu Wu Superseded
[v5,1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - 151- 2023-06-13 Xingyu Wu Superseded
[v6,11/11] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - 16-- 2023-05-18 Xingyu Wu conchuod Superseded
[v6,10/11] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - 16-- 2023-05-18 Xingyu Wu conchuod Superseded
[v6,09/11] riscv: dts: starfive: jh7110: add pmu controller node Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - 16-- 2023-05-18 Xingyu Wu conchuod Superseded
[v6,08/11] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - 16-- 2023-05-18 Xingyu Wu Superseded
[v6,07/11] MAINTAINERS: Update maintainer of JH71x0 clock drivers Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - 16-- 2023-05-18 Xingyu Wu Superseded
[v6,06/11] clk: starfive: Add StarFive JH7110 Video-Output clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - 151- 2023-05-18 Xingyu Wu Superseded
[v6,05/11] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - 151- 2023-05-18 Xingyu Wu Superseded
[v6,04/11] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - - - 151- 2023-05-18 Xingyu Wu Superseded
[v6,03/11] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - 151- 2023-05-18 Xingyu Wu Superseded
[v6,02/11] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - 151- 2023-05-18 Xingyu Wu Superseded
[v6,01/11] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 - 1 - 151- 2023-05-18 Xingyu Wu Superseded
[v4,7/7] riscv: dts: starfive: jh7110: Add PLL clock node and modify syscrg node Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - 16-- 2023-05-12 Xingyu Wu conchuod Superseded
[v4,6/7] riscv: dts: starfive: jh7110: Add syscon nodes Add PLL clocks driver and syscon for StarFive JH7110 SoC - 2 - 16-- 2023-05-12 Xingyu Wu conchuod Superseded
[v4,5/7] dt-bindings: soc: starfive: Add StarFive syscon module Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - 16-- 2023-05-12 Xingyu Wu conchuod Superseded
[v4,4/7] clk: starfive: jh7110-sys: Modify PLL clocks source Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - 16-- 2023-05-12 Xingyu Wu Superseded
[v4,3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Add PLL clocks driver and syscon for StarFive JH7110 SoC 1 - - 15-1 2023-05-12 Xingyu Wu Superseded
[v4,2/7] clk: starfive: Add StarFive JH7110 PLL clock driver Add PLL clocks driver and syscon for StarFive JH7110 SoC - - - 151- 2023-05-12 Xingyu Wu Superseded
[v4,1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Add PLL clocks driver and syscon for StarFive JH7110 SoC - 1 - 151- 2023-05-12 Xingyu Wu Superseded
[v1,2/2] riscv: dts: starfive: jh7110: Add watchdog node Add watchdog nodes in StarFive JH7100/JH7110 DTS - 1 - 17-- 2023-05-09 Xingyu Wu conchuod Accepted
[v1,1/2] riscv: dts: starfive: jh7100: Add watchdog node Add watchdog nodes in StarFive JH7100/JH7110 DTS - 1 - 17-- 2023-05-09 Xingyu Wu conchuod Accepted
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