Show patches with: Submitter = Samuel Holland       |    Archived = No       |   296 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[4/7] perf vendor events riscv: Add SiFive Bullet version 0x07 events perf vendor events riscv: Update SiFive CPU PMU events - - - 121- 2024-05-09 Samuel Holland Handled Elsewhere
[3/7] perf vendor events riscv: Update SiFive Bullet events perf vendor events riscv: Update SiFive CPU PMU events - - - 13-- 2024-05-09 Samuel Holland Handled Elsewhere
[2/7] perf vendor events riscv: Remove leading zeroes perf vendor events riscv: Update SiFive CPU PMU events - - - 13-- 2024-05-09 Samuel Holland Handled Elsewhere
[1/7] perf vendor events riscv: Rename U74 to Bullet perf vendor events riscv: Update SiFive CPU PMU events - - - 121- 2024-05-09 Samuel Holland Handled Elsewhere
[4/4] cache: sifive_ccache: Add EDAC and PMU as auxiliary devices cache: sifive_ccache: Auxiliary device support - - - --1 2024-04-10 Samuel Holland conchuod Changes Requested
[3/4] cache: sifive_ccache: Export base address for child drivers cache: sifive_ccache: Auxiliary device support - - - --1 2024-04-10 Samuel Holland conchuod Changes Requested
[2/4] cache: sifive_ccache: Use of_iomap() helper cache: sifive_ccache: Auxiliary device support - - - --1 2024-04-10 Samuel Holland conchuod Changes Requested
[1/4] cache: sifive_ccache: Silence unused variable warning cache: sifive_ccache: Auxiliary device support - - - --1 2024-04-10 Samuel Holland conchuod Changes Requested
[v4,15/15] selftests/fpu: Allow building on other architectures Unified cross-architecture kernel-mode FPU API - 1 - --1 2024-03-29 Samuel Holland Handled Elsewhere
[v4,14/15] selftests/fpu: Move FP code to a separate translation unit Unified cross-architecture kernel-mode FPU API - 1 - 12-1 2024-03-29 Samuel Holland Handled Elsewhere
[v4,13/15] drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API 2 1 - 1111 2024-03-29 Samuel Holland Handled Elsewhere
[v4,12/15] drm/amd/display: Only use hard-float, not altivec on powerpc Unified cross-architecture kernel-mode FPU API 2 - - 1012 2024-03-29 Samuel Holland Handled Elsewhere
[v4,11/15] riscv: Add support for kernel-mode FPU Unified cross-architecture kernel-mode FPU API 1 2 - 12-1 2024-03-29 Samuel Holland Handled Elsewhere
[v4,10/15] x86: Implement ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API - 1 - 1111 2024-03-29 Samuel Holland Handled Elsewhere
[v4,09/15] x86/fpu: Fix asm/fpu/types.h include guard Unified cross-architecture kernel-mode FPU API 1 - - 1111 2024-03-29 Samuel Holland Handled Elsewhere
[v4,08/15] powerpc: Implement ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API 1 1 - 1111 2024-03-29 Samuel Holland Handled Elsewhere
[v4,07/15] LoongArch: Implement ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API 1 1 - 12-1 2024-03-29 Samuel Holland Handled Elsewhere
[v4,06/15] lib/raid6: Use CC_FLAGS_FPU for NEON CFLAGS Unified cross-architecture kernel-mode FPU API - 1 - 12-1 2024-03-29 Samuel Holland Handled Elsewhere
[v4,05/15] arm64: crypto: Use CC_FLAGS_FPU for NEON CFLAGS Unified cross-architecture kernel-mode FPU API - 1 - 12-1 2024-03-29 Samuel Holland Handled Elsewhere
[v4,04/15] arm64: Implement ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API - 1 - 1111 2024-03-29 Samuel Holland Handled Elsewhere
[v4,03/15] ARM: crypto: Use CC_FLAGS_FPU for NEON CFLAGS Unified cross-architecture kernel-mode FPU API - 1 - 12-1 2024-03-29 Samuel Holland Handled Elsewhere
[v4,02/15] ARM: Implement ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API - 1 - 1111 2024-03-29 Samuel Holland Handled Elsewhere
[v4,01/15] arch: Add ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API - 1 - 1111 2024-03-29 Samuel Holland Handled Elsewhere
[v3,14/14] selftests/fpu: Allow building on other architectures Unified cross-architecture kernel-mode FPU API - 1 - 12-1 2024-03-27 Samuel Holland Superseded
[v3,13/14] selftests/fpu: Move FP code to a separate translation unit Unified cross-architecture kernel-mode FPU API - 1 - 1111 2024-03-27 Samuel Holland Superseded
[v3,12/14] drm/amd/display: Use ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API 1 1 - 1012 2024-03-27 Samuel Holland Superseded
[v3,11/14] drm/amd/display: Only use hard-float, not altivec on powerpc Unified cross-architecture kernel-mode FPU API 1 - - 12-1 2024-03-27 Samuel Holland Superseded
[v3,10/14] riscv: Add support for kernel-mode FPU Unified cross-architecture kernel-mode FPU API 1 2 - 1111 2024-03-27 Samuel Holland Superseded
[v3,09/14] x86: Implement ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API - 1 - 1111 2024-03-27 Samuel Holland Superseded
[v3,08/14] powerpc: Implement ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API 1 1 - 1111 2024-03-27 Samuel Holland Superseded
[v3,07/14] LoongArch: Implement ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API 1 1 - 12-1 2024-03-27 Samuel Holland Superseded
[v3,06/14] lib/raid6: Use CC_FLAGS_FPU for NEON CFLAGS Unified cross-architecture kernel-mode FPU API - 1 - 12-1 2024-03-27 Samuel Holland Superseded
[v3,05/14] arm64: crypto: Use CC_FLAGS_FPU for NEON CFLAGS Unified cross-architecture kernel-mode FPU API - 1 - 12-1 2024-03-27 Samuel Holland Superseded
[v3,04/14] arm64: Implement ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API - 1 - 1111 2024-03-27 Samuel Holland Superseded
[v3,03/14] ARM: crypto: Use CC_FLAGS_FPU for NEON CFLAGS Unified cross-architecture kernel-mode FPU API - 1 - 12-1 2024-03-27 Samuel Holland Superseded
[v3,02/14] ARM: Implement ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API - 1 - 1111 2024-03-27 Samuel Holland Superseded
[v3,01/14] arch: Add ARCH_HAS_KERNEL_FPU_SUPPORT Unified cross-architecture kernel-mode FPU API - 1 - 1111 2024-03-27 Samuel Holland Superseded
[v2,7/7] riscv: Remove extra variable in patch_text_nosync() riscv: Various text patching improvements - 2 - --1 2024-03-27 Samuel Holland Accepted
[v2,6/7] riscv: Use offset_in_page() in text patching functions riscv: Various text patching improvements - 2 - --1 2024-03-27 Samuel Holland Accepted
[v2,5/7] riscv: Pass patch_text() the length in bytes riscv: Various text patching improvements - 2 - --1 2024-03-27 Samuel Holland Accepted
[v2,4/7] riscv: Simplify text patching loops riscv: Various text patching improvements - 2 - --1 2024-03-27 Samuel Holland Accepted
[v2,3/7] riscv: kprobes: Use patch_text_nosync() for insn slots riscv: Various text patching improvements - 1 - --1 2024-03-27 Samuel Holland Accepted
[v2,2/7] riscv: jump_label: Simplify assembly syntax riscv: Various text patching improvements - 1 - --1 2024-03-27 Samuel Holland Accepted
[v2,1/7] riscv: jump_label: Batch icache maintenance riscv: Various text patching improvements - 1 - --1 2024-03-27 Samuel Holland Accepted
[v2,2/2] riscv: Define TASK_SIZE_MAX for __access_ok() riscv: access_ok() optimization - 2 - 13-- 2024-03-27 Samuel Holland Accepted
[v2,1/2] riscv: Remove PGDIR_SIZE_L3 and TASK_SIZE_MIN riscv: access_ok() optimization 1 1 - 13-- 2024-03-27 Samuel Holland Accepted
cache: sifive_ccache: Partially convert to a platform driver cache: sifive_ccache: Partially convert to a platform driver - - 1 13-- 2024-03-27 Samuel Holland conchuod Accepted
[v6,13/13] riscv: mm: Always use an ASID to flush mm contexts riscv: ASID-related and UP-related TLB flush enhancements - 1 - 13-- 2024-03-27 Samuel Holland Accepted
[v6,12/13] riscv: mm: Preserve global TLB entries when switching contexts riscv: ASID-related and UP-related TLB flush enhancements - 1 - 13-- 2024-03-27 Samuel Holland Accepted
[v6,11/13] riscv: mm: Make asid_bits a local variable riscv: ASID-related and UP-related TLB flush enhancements - 1 - 13-- 2024-03-27 Samuel Holland Accepted
[v6,10/13] riscv: mm: Use a fixed layout for the MM context ID riscv: ASID-related and UP-related TLB flush enhancements - 1 - 13-- 2024-03-27 Samuel Holland Accepted
[v6,09/13] riscv: mm: Introduce cntx2asid/cntx2version helper macros riscv: ASID-related and UP-related TLB flush enhancements - 1 - 13-- 2024-03-27 Samuel Holland Accepted
[v6,08/13] riscv: Avoid TLB flush loops when affected by SiFive CIP-1200 riscv: ASID-related and UP-related TLB flush enhancements - 1 - 13-- 2024-03-27 Samuel Holland Accepted
[v6,07/13] riscv: Apply SiFive CIP-1200 workaround to single-ASID sfence.vma riscv: ASID-related and UP-related TLB flush enhancements - - - 13-- 2024-03-27 Samuel Holland Accepted
[v6,06/13] riscv: mm: Combine the SMP and UP TLB flush code riscv: ASID-related and UP-related TLB flush enhancements - 2 - 13-- 2024-03-27 Samuel Holland Accepted
[v6,05/13] riscv: Only send remote fences when some other CPU is online riscv: ASID-related and UP-related TLB flush enhancements - 1 - 13-- 2024-03-27 Samuel Holland Accepted
[v6,04/13] riscv: mm: Broadcast kernel TLB flushes only when needed riscv: ASID-related and UP-related TLB flush enhancements - 1 - 13-- 2024-03-27 Samuel Holland Accepted
[v6,03/13] riscv: Use IPIs for remote cache/TLB flushes by default riscv: ASID-related and UP-related TLB flush enhancements - 2 - 13-- 2024-03-27 Samuel Holland Accepted
[v6,02/13] riscv: Factor out page table TLB synchronization riscv: ASID-related and UP-related TLB flush enhancements - 1 - 13-- 2024-03-27 Samuel Holland Accepted
[v6,01/13] riscv: Flush the instruction cache during SMP bringup riscv: ASID-related and UP-related TLB flush enhancements - 1 - 121- 2024-03-27 Samuel Holland Accepted
[v2] riscv: Add tracepoints for SBI calls and returns [v2] riscv: Add tracepoints for SBI calls and returns - 1 - 121- 2024-03-21 Samuel Holland Accepted
[RFC,9/9] selftests: riscv: Add a pointer masking test riscv: Userspace pointer masking and tagged address ABI - - - 913 2024-03-19 Samuel Holland RFC
[RFC,8/9] riscv: Allow ptrace control of the tagged address ABI riscv: Userspace pointer masking and tagged address ABI - - - 12-1 2024-03-19 Samuel Holland RFC
[RFC,7/9] riscv: Add support for the tagged address ABI riscv: Userspace pointer masking and tagged address ABI - - - 1111 2024-03-19 Samuel Holland RFC
[RFC,6/9] riscv: Add support for userspace pointer masking riscv: Userspace pointer masking and tagged address ABI - - - 12-1 2024-03-19 Samuel Holland RFC
[RFC,5/9] riscv: Split per-CPU and per-thread envcfg bits riscv: Userspace pointer masking and tagged address ABI - - - 12-1 2024-03-19 Samuel Holland RFC
[RFC,4/9] riscv: Define is_compat_thread() riscv: Userspace pointer masking and tagged address ABI - - - 12-1 2024-03-19 Samuel Holland RFC
[RFC,3/9] riscv: Add CSR definitions for pointer masking riscv: Userspace pointer masking and tagged address ABI - - - 12-1 2024-03-19 Samuel Holland RFC
[RFC,2/9] riscv: Add ISA extension parsing for pointer masking riscv: Userspace pointer masking and tagged address ABI - - - 12-1 2024-03-19 Samuel Holland RFC
[RFC,1/9] dt-bindings: riscv: Add pointer masking ISA extensions riscv: Userspace pointer masking and tagged address ABI - - - 12-1 2024-03-19 Samuel Holland RFC
irqchip/riscv-intc: Fix use of AIA IRQs 32-63 on riscv32 irqchip/riscv-intc: Fix use of AIA IRQs 32-63 on riscv32 - 1 - --1 2024-03-12 Samuel Holland Accepted
riscv: Add tracepoints for SBI calls and returns riscv: Add tracepoints for SBI calls and returns - 1 - 121- 2024-03-12 Samuel Holland Superseded
riscv: Do not save the scratch CSR during suspend riscv: Do not save the scratch CSR during suspend - 1 - 14-- 2024-03-12 Samuel Holland Accepted
clocksource/drivers/timer-riscv: Drop extra CSR write clocksource/drivers/timer-riscv: Drop extra CSR write - - - 13-- 2024-03-12 Samuel Holland Rejected
clocksource/drivers/timer-sun4i: Partially convert to a platform driver clocksource/drivers/timer-sun4i: Partially convert to a platform driver - - - 1012 2024-03-12 Samuel Holland Handled Elsewhere
riscv: Fix spurious errors from __get/put_kernel_nofault riscv: Fix spurious errors from __get/put_kernel_nofault - 2 - 13-- 2024-03-12 Samuel Holland Accepted
riscv: mm: Fix prototype to avoid discarding const riscv: mm: Fix prototype to avoid discarding const - 2 - 13-- 2024-03-01 Samuel Holland Accepted
[v5,13/13] riscv: mm: Always use an ASID to flush mm contexts riscv: ASID-related and UP-related TLB flush enhancements - 1 - 11-3 2024-02-29 Samuel Holland Superseded
[v5,12/13] riscv: mm: Preserve global TLB entries when switching contexts riscv: ASID-related and UP-related TLB flush enhancements - 1 - 11-3 2024-02-29 Samuel Holland Superseded
[v5,11/13] riscv: mm: Make asid_bits a local variable riscv: ASID-related and UP-related TLB flush enhancements - 1 - 11-3 2024-02-29 Samuel Holland Superseded
[v5,10/13] riscv: mm: Use a fixed layout for the MM context ID riscv: ASID-related and UP-related TLB flush enhancements - 1 - 11-2 2024-02-29 Samuel Holland Superseded
[v5,09/13] riscv: mm: Introduce cntx2asid/cntx2version helper macros riscv: ASID-related and UP-related TLB flush enhancements - 1 - 10-3 2024-02-29 Samuel Holland Superseded
[v5,08/13] riscv: Avoid TLB flush loops when affected by SiFive CIP-1200 riscv: ASID-related and UP-related TLB flush enhancements - - - 11-3 2024-02-29 Samuel Holland Superseded
[v5,07/13] riscv: Apply SiFive CIP-1200 workaround to single-ASID sfence.vma riscv: ASID-related and UP-related TLB flush enhancements - - - 11-2 2024-02-29 Samuel Holland Superseded
[v5,06/13] riscv: mm: Combine the SMP and UP TLB flush code riscv: ASID-related and UP-related TLB flush enhancements - 1 - 11-3 2024-02-29 Samuel Holland Superseded
[v5,05/13] riscv: Only send remote fences when some other CPU is online riscv: ASID-related and UP-related TLB flush enhancements - - - 11-3 2024-02-29 Samuel Holland Superseded
[v5,04/13] riscv: mm: Broadcast kernel TLB flushes only when needed riscv: ASID-related and UP-related TLB flush enhancements - 1 - 11-3 2024-02-29 Samuel Holland Superseded
[v5,03/13] riscv: Use IPIs for remote cache/TLB flushes by default riscv: ASID-related and UP-related TLB flush enhancements - 1 - 10-4 2024-02-29 Samuel Holland Superseded
[v5,02/13] riscv: Factor out page table TLB synchronization riscv: ASID-related and UP-related TLB flush enhancements - - - 11-3 2024-02-29 Samuel Holland Superseded
[v5,01/13] riscv: Flush the instruction cache during SMP bringup riscv: ASID-related and UP-related TLB flush enhancements - 1 - 1112 2024-02-29 Samuel Holland Superseded
[-fixes,v4,3/3] riscv: Save/restore envcfg CSR during CPU suspend riscv: cbo.zero fixes - 2 - 13-- 2024-02-28 Samuel Holland Accepted
[-fixes,v4,2/3] riscv: Add a custom ISA extension for the [ms]envcfg CSR riscv: cbo.zero fixes - 2 - 13-- 2024-02-28 Samuel Holland Accepted
[-fixes,v4,1/3] riscv: Fix enabling cbo.zero when running in M-mode riscv: cbo.zero fixes - 2 - 13-- 2024-02-28 Samuel Holland Accepted
[4/4] riscv: Allow NOMMU kernels to run in S-mode riscv: 64-bit NOMMU fixes and enhancements - 1 - 13-- 2024-02-27 Samuel Holland Accepted
[3/4] riscv: Remove MMU dependency from Zbb and Zicboz riscv: 64-bit NOMMU fixes and enhancements - 1 - 13-- 2024-02-27 Samuel Holland Accepted
[2/4] riscv: Fix loading 64-bit NOMMU kernels past the start of RAM riscv: 64-bit NOMMU fixes and enhancements - - - 13-- 2024-02-27 Samuel Holland Accepted
[1/4] riscv: Fix TASK_SIZE on 64-bit NOMMU riscv: 64-bit NOMMU fixes and enhancements - 2 - 13-- 2024-02-27 Samuel Holland Accepted
[v1,6/6] drivers/perf: Add SiFive Private L2 Cache PMU driver SiFive cache controller PMU drivers - - - 121- 2024-02-16 Samuel Holland conchuod Changes Requested
[v1,5/6] dt-bindings: cache: Add SiFive Private L2 Cache controller SiFive cache controller PMU drivers - - - 121- 2024-02-16 Samuel Holland conchuod Changes Requested
[v1,4/6] drivers/perf: Add SiFive Extensible Cache PMU driver SiFive cache controller PMU drivers - - - 121- 2024-02-16 Samuel Holland conchuod Changes Requested
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