| Message ID | 1d879dba4e4ee9a82e27625d6483b5c9cfed684f.1690704360.git.namcaov@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | d943705fba3af1dec5a999cb3739949710a1aa90 |
| Headers | show |
| Series | riscv: kprobes: simulate some instructions | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/cover_letter | success | Series has a cover letter |
| conchuod/tree_selection | success | Guessed tree name to be for-next at HEAD 471aba2e4760 |
| conchuod/fixes_present | success | Fixes tag not required for -next series |
| conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 4 and now 4 |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 3 this patch: 3 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 69 lines checked |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | No Fixes tag |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Sun, Jul 30, 2023 at 10:27:09AM +0200, Nam Cao wrote: > kprobes currently rejects instruction c.beqz and c.bnez. Implement them. > > Signed-off-by: Nam Cao <namcaov@gmail.com> > --- > arch/riscv/kernel/probes/decode-insn.c | 4 +-- > arch/riscv/kernel/probes/simulate-insn.c | 44 ++++++++++++++++++++++++ > arch/riscv/kernel/probes/simulate-insn.h | 2 ++ > 3 files changed, 48 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/kernel/probes/decode-insn.c b/arch/riscv/kernel/probes/decode-insn.c > index 6dba23a55ac7..65d9590bfb9f 100644 > --- a/arch/riscv/kernel/probes/decode-insn.c > +++ b/arch/riscv/kernel/probes/decode-insn.c > @@ -30,13 +30,13 @@ riscv_probe_decode_insn(probe_opcode_t *addr, struct arch_probe_insn *api) > */ > #ifdef CONFIG_RISCV_ISA_C > RISCV_INSN_REJECTED(c_jal, insn); > - RISCV_INSN_REJECTED(c_beqz, insn); > - RISCV_INSN_REJECTED(c_bnez, insn); > RISCV_INSN_REJECTED(c_ebreak, insn); > > RISCV_INSN_SET_SIMULATE(c_j, insn); > RISCV_INSN_SET_SIMULATE(c_jr, insn); > RISCV_INSN_SET_SIMULATE(c_jalr, insn); > + RISCV_INSN_SET_SIMULATE(c_beqz, insn); > + RISCV_INSN_SET_SIMULATE(c_bnez, insn); > #endif > > RISCV_INSN_SET_SIMULATE(jal, insn); > diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c > index 1ead6f4951f9..d3099d67816d 100644 > --- a/arch/riscv/kernel/probes/simulate-insn.c > +++ b/arch/riscv/kernel/probes/simulate-insn.c > @@ -249,3 +249,47 @@ bool __kprobes simulate_c_jalr(u32 opcode, unsigned long addr, struct pt_regs *r > { > return simulate_c_jr_jalr(opcode, addr, regs, true); > } > + > +static bool __kprobes simulate_c_bnez_beqz(u32 opcode, unsigned long addr, struct pt_regs *regs, > + bool is_bnez) > +{ > + /* > + * 15 13 12 10 9 7 6 2 1 0 > + * | funct3 | offset[8|4:3] | rs1' | offset[7:6|2:1|5] | op | > + * 3 3 3 5 2 > + */ > + > + s32 offset; > + u32 rs1; > + unsigned long rs1_val; > + > + rs1 = 0x8 | ((opcode >> 7) & 0x7); > + > + if (!rv_insn_reg_get_val(regs, rs1, &rs1_val)) > + return false; > + > + if ((rs1_val != 0 && is_bnez) || (rs1_val == 0 && !is_bnez)) { > + offset = ((opcode >> 3) & 0x3) << 1; > + offset |= ((opcode >> 10) & 0x3) << 3; > + offset |= ((opcode >> 2) & 0x1) << 5; > + offset |= ((opcode >> 5) & 0x3) << 6; > + offset |= ((opcode >> 12) & 0x1) << 8; > + offset = sign_extend32(offset, 8); > + } else { > + offset = 2; > + } > + > + instruction_pointer_set(regs, addr + offset); > + > + return true; > +} > + > +bool __kprobes simulate_c_bnez(u32 opcode, unsigned long addr, struct pt_regs *regs) > +{ > + return simulate_c_bnez_beqz(opcode, addr, regs, true); > +} > + > +bool __kprobes simulate_c_beqz(u32 opcode, unsigned long addr, struct pt_regs *regs) > +{ > + return simulate_c_bnez_beqz(opcode, addr, regs, false); > +} > diff --git a/arch/riscv/kernel/probes/simulate-insn.h b/arch/riscv/kernel/probes/simulate-insn.h > index 472a1948ec4f..44ebbc444db9 100644 > --- a/arch/riscv/kernel/probes/simulate-insn.h > +++ b/arch/riscv/kernel/probes/simulate-insn.h > @@ -27,5 +27,7 @@ bool simulate_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs); > bool simulate_c_j(u32 opcode, unsigned long addr, struct pt_regs *regs); > bool simulate_c_jr(u32 opcode, unsigned long addr, struct pt_regs *regs); > bool simulate_c_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs); > +bool simulate_c_bnez(u32 opcode, unsigned long addr, struct pt_regs *regs); > +bool simulate_c_beqz(u32 opcode, unsigned long addr, struct pt_regs *regs); > > #endif /* _RISCV_KERNEL_PROBES_SIMULATE_INSN_H */ > -- > 2.34.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv You can add: Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
diff --git a/arch/riscv/kernel/probes/decode-insn.c b/arch/riscv/kernel/probes/decode-insn.c index 6dba23a55ac7..65d9590bfb9f 100644 --- a/arch/riscv/kernel/probes/decode-insn.c +++ b/arch/riscv/kernel/probes/decode-insn.c @@ -30,13 +30,13 @@ riscv_probe_decode_insn(probe_opcode_t *addr, struct arch_probe_insn *api) */ #ifdef CONFIG_RISCV_ISA_C RISCV_INSN_REJECTED(c_jal, insn); - RISCV_INSN_REJECTED(c_beqz, insn); - RISCV_INSN_REJECTED(c_bnez, insn); RISCV_INSN_REJECTED(c_ebreak, insn); RISCV_INSN_SET_SIMULATE(c_j, insn); RISCV_INSN_SET_SIMULATE(c_jr, insn); RISCV_INSN_SET_SIMULATE(c_jalr, insn); + RISCV_INSN_SET_SIMULATE(c_beqz, insn); + RISCV_INSN_SET_SIMULATE(c_bnez, insn); #endif RISCV_INSN_SET_SIMULATE(jal, insn); diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c index 1ead6f4951f9..d3099d67816d 100644 --- a/arch/riscv/kernel/probes/simulate-insn.c +++ b/arch/riscv/kernel/probes/simulate-insn.c @@ -249,3 +249,47 @@ bool __kprobes simulate_c_jalr(u32 opcode, unsigned long addr, struct pt_regs *r { return simulate_c_jr_jalr(opcode, addr, regs, true); } + +static bool __kprobes simulate_c_bnez_beqz(u32 opcode, unsigned long addr, struct pt_regs *regs, + bool is_bnez) +{ + /* + * 15 13 12 10 9 7 6 2 1 0 + * | funct3 | offset[8|4:3] | rs1' | offset[7:6|2:1|5] | op | + * 3 3 3 5 2 + */ + + s32 offset; + u32 rs1; + unsigned long rs1_val; + + rs1 = 0x8 | ((opcode >> 7) & 0x7); + + if (!rv_insn_reg_get_val(regs, rs1, &rs1_val)) + return false; + + if ((rs1_val != 0 && is_bnez) || (rs1_val == 0 && !is_bnez)) { + offset = ((opcode >> 3) & 0x3) << 1; + offset |= ((opcode >> 10) & 0x3) << 3; + offset |= ((opcode >> 2) & 0x1) << 5; + offset |= ((opcode >> 5) & 0x3) << 6; + offset |= ((opcode >> 12) & 0x1) << 8; + offset = sign_extend32(offset, 8); + } else { + offset = 2; + } + + instruction_pointer_set(regs, addr + offset); + + return true; +} + +bool __kprobes simulate_c_bnez(u32 opcode, unsigned long addr, struct pt_regs *regs) +{ + return simulate_c_bnez_beqz(opcode, addr, regs, true); +} + +bool __kprobes simulate_c_beqz(u32 opcode, unsigned long addr, struct pt_regs *regs) +{ + return simulate_c_bnez_beqz(opcode, addr, regs, false); +} diff --git a/arch/riscv/kernel/probes/simulate-insn.h b/arch/riscv/kernel/probes/simulate-insn.h index 472a1948ec4f..44ebbc444db9 100644 --- a/arch/riscv/kernel/probes/simulate-insn.h +++ b/arch/riscv/kernel/probes/simulate-insn.h @@ -27,5 +27,7 @@ bool simulate_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs); bool simulate_c_j(u32 opcode, unsigned long addr, struct pt_regs *regs); bool simulate_c_jr(u32 opcode, unsigned long addr, struct pt_regs *regs); bool simulate_c_jalr(u32 opcode, unsigned long addr, struct pt_regs *regs); +bool simulate_c_bnez(u32 opcode, unsigned long addr, struct pt_regs *regs); +bool simulate_c_beqz(u32 opcode, unsigned long addr, struct pt_regs *regs); #endif /* _RISCV_KERNEL_PROBES_SIMULATE_INSN_H */
kprobes currently rejects instruction c.beqz and c.bnez. Implement them. Signed-off-by: Nam Cao <namcaov@gmail.com> --- arch/riscv/kernel/probes/decode-insn.c | 4 +-- arch/riscv/kernel/probes/simulate-insn.c | 44 ++++++++++++++++++++++++ arch/riscv/kernel/probes/simulate-insn.h | 2 ++ 3 files changed, 48 insertions(+), 2 deletions(-)