| Message ID | 1fdb9ffe223057e0140324ae020c9cc1dc90ae5c.1639660956.git.geert@linux-m68k.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | riscv: dts: Miscellaneous fixes | expand |
On 16/12/2021 13:37, Geert Uytterhoeven wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > "make dtbs_check" reports: > > arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: soc: refclk: {'compatible': ['fixed-clock'], '#clock-cells': [[0]], 'clock-frequency': [[600000000]], 'clock-output-names': ['msspllclk'], 'phandle': [[7]]} should not be valid under {'type': 'object'} > From schema: dtschema/schemas/simple-bus.yaml > > Fix this by moving the node out of the "soc" subnode. > While at it, rename it to "msspllclk", and drop the now superfluous > "clock-output-names" property. > Move the actual clock-frequency value to the board DTS, since it is not > set until bitstream programming time. > > Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Looks good to me. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > --- > v2: > - Add Acked-by, > - Move clock-frequency to board DTS. > --- > .../boot/dts/microchip/microchip-mpfs-icicle-kit.dts | 4 ++++ > arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 12 +++++------- > 2 files changed, 9 insertions(+), 7 deletions(-) > > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > index fc1e5869df1b9fc5..0c748ae1b0068df7 100644 > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > @@ -35,6 +35,10 @@ memory@80000000 { > }; > }; > > +&refclk { > + clock-frequency = <600000000>; > +}; > + > &serial0 { > status = "okay"; > }; > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > index ee59751544a0d3bc..b372bc6459bf163a 100644 > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > @@ -139,6 +139,11 @@ cpu4_intc: interrupt-controller { > }; > }; > > + refclk: msspllclk { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + }; > + > soc { > #address-cells = <2>; > #size-cells = <2>; > @@ -189,13 +194,6 @@ dma@3000000 { > #dma-cells = <1>; > }; > > - refclk: refclk { > - compatible = "fixed-clock"; > - #clock-cells = <0>; > - clock-frequency = <600000000>; > - clock-output-names = "msspllclk"; > - }; > - > clkcfg: clkcfg@20002000 { > compatible = "microchip,mpfs-clkcfg"; > reg = <0x0 0x20002000 0x0 0x1000>; > -- > 2.25.1 >
diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts index fc1e5869df1b9fc5..0c748ae1b0068df7 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts @@ -35,6 +35,10 @@ memory@80000000 { }; }; +&refclk { + clock-frequency = <600000000>; +}; + &serial0 { status = "okay"; }; diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index ee59751544a0d3bc..b372bc6459bf163a 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -139,6 +139,11 @@ cpu4_intc: interrupt-controller { }; }; + refclk: msspllclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + soc { #address-cells = <2>; #size-cells = <2>; @@ -189,13 +194,6 @@ dma@3000000 { #dma-cells = <1>; }; - refclk: refclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <600000000>; - clock-output-names = "msspllclk"; - }; - clkcfg: clkcfg@20002000 { compatible = "microchip,mpfs-clkcfg"; reg = <0x0 0x20002000 0x0 0x1000>;
"make dtbs_check" reports: arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: soc: refclk: {'compatible': ['fixed-clock'], '#clock-cells': [[0]], 'clock-frequency': [[600000000]], 'clock-output-names': ['msspllclk'], 'phandle': [[7]]} should not be valid under {'type': 'object'} From schema: dtschema/schemas/simple-bus.yaml Fix this by moving the node out of the "soc" subnode. While at it, rename it to "msspllclk", and drop the now superfluous "clock-output-names" property. Move the actual clock-frequency value to the board DTS, since it is not set until bitstream programming time. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- v2: - Add Acked-by, - Move clock-frequency to board DTS. --- .../boot/dts/microchip/microchip-mpfs-icicle-kit.dts | 4 ++++ arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 12 +++++------- 2 files changed, 9 insertions(+), 7 deletions(-)