[2/3] RISC-V: defconfig: Enable Generic PCIE by default

Message ID	20190123225025.32052-3-palmer@sifive.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org> Subject: [PATCH 2/3] RISC-V: defconfig: Enable Generic PCIE by default Date: Wed, 23 Jan 2019 14:50:24 -0800 Message-Id: <20190123225025.32052-3-palmer@sifive.com> In-Reply-To: <20190123225025.32052-1-palmer@sifive.com> References: <20190123225025.32052-1-palmer@sifive.com> From: Palmer Dabbelt <palmer@sifive.com> To: linux-riscv@lists.infradead.org, Alistair Francis <Alistair.Francis@wdc.com>, Paul Walmsley <paul.walmsley@sifive.com> Precedence: list Cc: Palmer Dabbelt <palmer@sifive.com>, Alistair Francis <alistair.francis@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org
Series	RISC-V: defconfig: Cleanups and Generic PCIe Support \| expand [0/3] RISC-V: defconfig: Cleanups and Generic PCIe Support [1/3] RISC-V: defconfig: Move CONFIG_PCI{,E_XILINX} [2/3] RISC-V: defconfig: Enable Generic PCIE by default [3/3] RISC-V: defconfig: Add CRYPTO_DEV_VIRTIO=y

Message ID

20190123225025.32052-3-palmer@sifive.com (mailing list archive)

State

New, archived

Headers

Subject: [PATCH 2/3] RISC-V: defconfig: Enable Generic PCIE by default
Date: Wed, 23 Jan 2019 14:50:24 -0800
Message-Id: <20190123225025.32052-3-palmer@sifive.com>
In-Reply-To: <20190123225025.32052-1-palmer@sifive.com>
References: <20190123225025.32052-1-palmer@sifive.com>
From: Palmer Dabbelt <palmer@sifive.com>
To: linux-riscv@lists.infradead.org,
 Alistair Francis <Alistair.Francis@wdc.com>,
 Paul Walmsley <paul.walmsley@sifive.com>
Precedence: list
Cc: Palmer Dabbelt <palmer@sifive.com>,
 Alistair Francis <alistair.francis@wdc.com>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org>
Errors-To: 
 linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org

Series

RISC-V: defconfig: Cleanups and Generic PCIe Support | expand

Commit Message

Palmer Dabbelt Jan. 23, 2019, 10:50 p.m. UTC

From: Alistair Francis <Alistair.Francis@wdc.com>

Enable generic PCIe by default in the RISC-V defconfig, this allows us
to use QEMU's PCIe support out of the box.  CONFIG_RAS=y is
automatically selected by generic PCIe, so it has been dropped from
the defconfig.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
[Palmer: Split out PCIE_XILINX and CRYPTO_DEV_VIRTIO]
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
 arch/riscv/configs/defconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 658be23fa2c6..01fe50707d98 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -27,6 +27,8 @@  CONFIG_IP_PNP_BOOTP=y
 CONFIG_IP_PNP_RARP=y
 CONFIG_NETLINK_DIAG=y
 CONFIG_PCI=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_HOST_GENERIC=y
 CONFIG_PCIE_XILINX=y
 CONFIG_DEVTMPFS=y
 CONFIG_BLK_DEV_LOOP=y
@@ -63,7 +65,6 @@  CONFIG_USB_STORAGE=y
 CONFIG_USB_UAS=y
 CONFIG_VIRTIO_MMIO=y
 CONFIG_SIFIVE_PLIC=y
-CONFIG_RAS=y
 CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_AUTOFS4_FS=y

[2/3] RISC-V: defconfig: Enable Generic PCIE by default

Commit Message

Patch