[09/17] riscv: improve the default power off implementation

Message ID	20190610221621.10938-10-hch@lst.de (mailing list archive)
State	New, archived
Headers	show Return-Path: <linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org> From: Christoph Hellwig <hch@lst.de> To: Palmer Dabbelt <palmer@sifive.com> Subject: [PATCH 09/17] riscv: improve the default power off implementation Date: Tue, 11 Jun 2019 00:16:13 +0200 Message-Id: <20190610221621.10938-10-hch@lst.de> In-Reply-To: <20190610221621.10938-1-hch@lst.de> References: <20190610221621.10938-1-hch@lst.de> MIME-Version: 1.0 Precedence: list Cc: linux-mm@kvack.org, Damien Le Moal <damien.lemoal@wdc.com>, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, uclinux-dev@uclinux.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org
Series	[01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU \| expand [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU [02/17] mm: stub out all of swapops.h for !CONFIG_MMU [03/17] mm/nommu: fix the MAP_UNINITIALIZED flag [04/17] irqchip/sifive-plic: set max threshold for ignored handlers [05/17] riscv: use CSR_SATP instead of the legacy sptbr name in switch_mm [06/17] riscv: clear the instruction cache and all registers when booting [07/17] riscv: refactor the IPI code [08/17] riscv: abstract out CSR names for supervisor vs machine mode [09/17] riscv: improve the default power off implementation [10/17] riscv: provide a flat entry loader [11/17] riscv: read hart ID from mhartid on boot [12/17] riscv: provide native clint access for M-mode [13/17] riscv: implement remote sfence.i natively for M-mode [14/17] riscv: poison SBI calls for M-mode [15/17] riscv: don't allow selecting SBI-based drivers for M-mode [16/17] riscv: use the correct interrupt levels for M-mode [17/17] riscv: add nommu support

Message ID

20190610221621.10938-10-hch@lst.de (mailing list archive)

State

New, archived

Headers

From: Christoph Hellwig <hch@lst.de>
To: Palmer Dabbelt <palmer@sifive.com>
Subject: [PATCH 09/17] riscv: improve the default power off implementation
Date: Tue, 11 Jun 2019 00:16:13 +0200
Message-Id: <20190610221621.10938-10-hch@lst.de>
In-Reply-To: <20190610221621.10938-1-hch@lst.de>
References: <20190610221621.10938-1-hch@lst.de>
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Cc: linux-mm@kvack.org, Damien Le Moal <damien.lemoal@wdc.com>,
 linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
 uclinux-dev@uclinux.org
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Series

[01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU | expand

Commit Message

Christoph Hellwig June 10, 2019, 10:16 p.m. UTC

Only call the SBI code if we are not running in M mode, and if we didn't
do the SBI call, or it didn't succeed call wfi in a loop to at least
save some power.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/riscv/kernel/reset.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/kernel/reset.c b/arch/riscv/kernel/reset.c
index cfb6eb1d762d..17c810985ad0 100644
--- a/arch/riscv/kernel/reset.c
+++ b/arch/riscv/kernel/reset.c
@@ -8,8 +8,11 @@ 
 
 static void default_power_off(void)
 {
+#ifndef CONFIG_M_MODE
 	sbi_shutdown();
-	while (1);
+#endif
+	while (1)
+		wait_for_interrupt();
 }
 
 void (*pm_power_off)(void) = default_power_off;

[09/17] riscv: improve the default power off implementation

Commit Message

Patch