[14/17] riscv: don't allow selecting SBI-based drivers for M-mode

From: Damien Le Moal <damien.lemoal@wdc.com>

From: Christoph Hellwig <hch@lst.de>
To: Palmer Dabbelt <palmer@sifive.com>,
 Paul Walmsley <paul.walmsley@sifive.com>
Subject: [PATCH 14/17] riscv: don't allow selecting SBI-based drivers for
 M-mode
Date: Mon, 24 Jun 2019 07:43:08 +0200
Message-Id: <20190624054311.30256-15-hch@lst.de>
In-Reply-To: <20190624054311.30256-1-hch@lst.de>
References: <20190624054311.30256-1-hch@lst.de>
MIME-Version: 1.0
Precedence: list
Cc: linux-mm@kvack.org, Damien Le Moal <damien.lemoal@wdc.com>,
 linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org>
Errors-To: 
 linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org

Message ID	20190624054311.30256-15-hch@lst.de (mailing list archive)
State	New, archived
Headers	show Return-Path: <linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org> From: Christoph Hellwig <hch@lst.de> To: Palmer Dabbelt <palmer@sifive.com>, Paul Walmsley <paul.walmsley@sifive.com> Subject: [PATCH 14/17] riscv: don't allow selecting SBI-based drivers for M-mode Date: Mon, 24 Jun 2019 07:43:08 +0200 Message-Id: <20190624054311.30256-15-hch@lst.de> In-Reply-To: <20190624054311.30256-1-hch@lst.de> References: <20190624054311.30256-1-hch@lst.de> MIME-Version: 1.0 Precedence: list Cc: linux-mm@kvack.org, Damien Le Moal <damien.lemoal@wdc.com>, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org
Series	[01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU \| expand [01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU [02/17] mm: stub out all of swapops.h for !CONFIG_MMU [03/17] mm/nommu: fix the MAP_UNINITIALIZED flag [04/17] irqchip/sifive-plic: set max threshold for ignored handlers [05/17] riscv: use CSR_SATP instead of the legacy sptbr name in switch_mm [06/17] riscv: refactor the IPI code [07/17] riscv: abstract out CSR names for supervisor vs machine mode [08/17] riscv: improve the default power off implementation [09/17] riscv: provide a flat entry loader [10/17] riscv: read the hart ID from mhartid on boot [11/17] riscv: provide native clint access for M-mode [12/17] riscv: implement remote sfence.i natively for M-mode [13/17] riscv: poison SBI calls for M-mode [14/17] riscv: don't allow selecting SBI-based drivers for M-mode [15/17] riscv: use the correct interrupt levels for M-mode [16/17] riscv: clear the instruction cache and all registers when booting [17/17] riscv: add nommu support

[14/17] riscv: don't allow selecting SBI-based drivers for M-mode

Commit Message

Patch