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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Jisheng Zhang Directly passing the cpu to flush_icache_deferred() rather than calling smp_processor_id() again. Here are some performance numbers: With a run of hackbench 30 times on a single core riscv64 Qemu instance with 1GB memory: without this patch: mean 36.934 with this patch: mean 36.104 (improved by 2.24%) Signed-off-by: Jisheng Zhang --- arch/riscv/mm/context.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/riscv/mm/context.c b/arch/riscv/mm/context.c index 68aa312fc352..6d445f2888ec 100644 --- a/arch/riscv/mm/context.c +++ b/arch/riscv/mm/context.c @@ -281,10 +281,9 @@ static inline void set_mm(struct mm_struct *mm, unsigned int cpu) * actually performs that local instruction cache flush, which implicitly only * refers to the current hart. */ -static inline void flush_icache_deferred(struct mm_struct *mm) +static inline void flush_icache_deferred(struct mm_struct *mm, unsigned int cpu) { #ifdef CONFIG_SMP - unsigned int cpu = smp_processor_id(); cpumask_t *mask = &mm->context.icache_stale_mask; if (cpumask_test_cpu(cpu, mask)) { @@ -320,5 +319,5 @@ void switch_mm(struct mm_struct *prev, struct mm_struct *next, set_mm(next, cpu); - flush_icache_deferred(next); + flush_icache_deferred(next, cpu); }