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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id v10sm195914pfu.123.2021.11.19.08.44.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Nov 2021 08:44:44 -0800 (PST) Subject: [PATCH 02/12] RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW Date: Fri, 19 Nov 2021 08:44:03 -0800 Message-Id: <20211119164413.29052-3-palmer@rivosinc.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211119164413.29052-1-palmer@rivosinc.com> References: <20211119164413.29052-1-palmer@rivosinc.com> MIME-Version: 1.0 Cc: Paul Walmsley , Palmer Dabbelt , aou@eecs.berkeley.edu, anup.patel@wdc.com, heinrich.schuchardt@canonical.com, atish.patra@wdc.com, bin.meng@windriver.com, sagar.kadam@sifive.com, damien.lemoal@wdc.com, axboe@kernel.dk, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Palmer Dabbelt , stable@vger.kernel.org From: Palmer Dabbelt To: linux-riscv@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211119_084449_805378_717AE60D X-CRM114-Status: GOOD ( 14.61 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Palmer Dabbelt For non-relocatable kernels we need to be able to link the kernel at approximately PAGE_OFFSET, thus requiring medany (as medlow requires the code to be linked within 2GiB of 0). The inverse doesn't apply, though: since medany code can be linked anywhere it's fine to link it close to 0, so we can support the smaller memory config. Fixes: de5f4b8f634b ("RISC-V: Define MAXPHYSMEM_1GB only for RV32") Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt Reviewed-by: Anup Patel Tested-by: Geert Uytterhoeven --- I found this when going through the savedefconfig diffs for the K210 defconfigs. I'm not entirely sure they're doing the right thing here (they should probably be setting CMODEL_LOW to take advantage of the better code generation), but I don't have any way to test those platforms so I don't want to change too much. --- arch/riscv/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 821252b65f89..61f64512dcde 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -280,7 +280,7 @@ choice depends on 32BIT bool "1GiB" config MAXPHYSMEM_2GB - depends on 64BIT && CMODEL_MEDLOW + depends on 64BIT bool "2GiB" config MAXPHYSMEM_128GB depends on 64BIT && CMODEL_MEDANY