Message ID | 20220210164943.2646-1-jszhang@kernel.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | riscv: alternative only works on !XIP_KERNEL | expand |
On Thu, 10 Feb 2022 08:49:43 PST (-0800), jszhang@kernel.org wrote: > The alternative mechanism needs runtime code patching, it can't work > on XIP_KERNEL. And the errata workarounds are implemented via the > alternative mechanism. So add !XIP_KERNEL dependency for alternative > and erratas. > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> > --- > arch/riscv/Kconfig.erratas | 1 + > arch/riscv/Kconfig.socs | 4 ++-- > 2 files changed, 3 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/Kconfig.erratas b/arch/riscv/Kconfig.erratas > index b44d6ecdb46e..0aacd7052585 100644 > --- a/arch/riscv/Kconfig.erratas > +++ b/arch/riscv/Kconfig.erratas > @@ -2,6 +2,7 @@ menu "CPU errata selection" > > config RISCV_ERRATA_ALTERNATIVE > bool "RISC-V alternative scheme" > + depends on !XIP_KERNEL > default y > help > This Kconfig allows the kernel to automatically patch the > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > index 6ec44a22278a..c112ab2a9052 100644 > --- a/arch/riscv/Kconfig.socs > +++ b/arch/riscv/Kconfig.socs > @@ -14,8 +14,8 @@ config SOC_SIFIVE > select CLK_SIFIVE > select CLK_SIFIVE_PRCI > select SIFIVE_PLIC > - select RISCV_ERRATA_ALTERNATIVE > - select ERRATA_SIFIVE > + select RISCV_ERRATA_ALTERNATIVE if !XIP_KERNEL > + select ERRATA_SIFIVE if !XIP_KERNEL > help > This enables support for SiFive SoC platform hardware. Thanks, this is on fixes.
diff --git a/arch/riscv/Kconfig.erratas b/arch/riscv/Kconfig.erratas index b44d6ecdb46e..0aacd7052585 100644 --- a/arch/riscv/Kconfig.erratas +++ b/arch/riscv/Kconfig.erratas @@ -2,6 +2,7 @@ menu "CPU errata selection" config RISCV_ERRATA_ALTERNATIVE bool "RISC-V alternative scheme" + depends on !XIP_KERNEL default y help This Kconfig allows the kernel to automatically patch the diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 6ec44a22278a..c112ab2a9052 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -14,8 +14,8 @@ config SOC_SIFIVE select CLK_SIFIVE select CLK_SIFIVE_PRCI select SIFIVE_PLIC - select RISCV_ERRATA_ALTERNATIVE - select ERRATA_SIFIVE + select RISCV_ERRATA_ALTERNATIVE if !XIP_KERNEL + select ERRATA_SIFIVE if !XIP_KERNEL help This enables support for SiFive SoC platform hardware.
The alternative mechanism needs runtime code patching, it can't work on XIP_KERNEL. And the errata workarounds are implemented via the alternative mechanism. So add !XIP_KERNEL dependency for alternative and erratas. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- arch/riscv/Kconfig.erratas | 1 + arch/riscv/Kconfig.socs | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-)