From patchwork Mon Feb 14 13:58:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12745644 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1AC60C433EF for ; Mon, 14 Feb 2022 13:56:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=bx4b79BuVtCdQb//HNRYctT6Dz7UDl7Woj9ewo4+oFg=; b=WlUGOft0EHspyI 1G7U18m+ejMPJzaDbEfGka8dPK9cyeJmS3GASePThNbi11L0r7/TUwsSdVpYasV5JBzMR1qwO2nJH 3WDeFKWW4SuUEFwe4AD9awJtSd8jg06hf9ukfbGKxQNcPRyMvnpvfOAz95cou4IV6NDSGRVxPP8P2 3hnfI5aEnGtdHAiNfHQtFxy+rdMbum4Q58BjcB/9SVQpTgW1fPHTdy/yiq/HlfFVEsbYxj31hZFZa 5BWFchK0z83xlWecoeJlx7+1om6V8y30QAfK2BGkP2g5SOy92NuAzLhS6OwFja5P52vUVQOXeX4Pu q8LKDBobdXj8TSUIH9cw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nJbqS-00FVbR-AO; Mon, 14 Feb 2022 13:56:48 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nJbqP-00FVZl-Ul for linux-riscv@lists.infradead.org; Mon, 14 Feb 2022 13:56:47 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1644847005; x=1676383005; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=CuM7K8ToBJ7RKoIFBCQywAvEKq4J6OlP+754BZRgkAU=; b=ViVOdrNKvQWYIR5ZaLrvVEPAPUhiCWuuM5rr1CFI9qv48GfkfYxK3AgF mKYysXnjMKB3oDa7GrXBj7zK/gQzpj//Eq3JFwrPtMeD9cgKIKd4Gdc3r 9y4fCQJn/p0iYWHjk3rgdtLlg4M+znsB2hIUfOLK59pRsyXGXhxvOwqxy YzGkgJDb3xGyNpmMT4DBOObDkMe4y0ayBm3PTvDHGna+ZjRK//1for4e9 vsjcUOWr+7TC2QWrYhV/qUNkr2s5WTOk0ym/N73loltrtNWeLXqL2duqf kWlwHu7WW/Ef9air9d9SWKtKaqHb7JU9jLusPZ+aPrmzDeCMNO3zkhkr0 g==; IronPort-SDR: B4lG6+0O8Fx8pvTp7P8/ONZSveDcqE57ZBUKdWX9EA6vsq0sDSyTpZotJRZPZgLeVR6rLU5EHG o8HqLk8S45lD/NFgNfjuz+BeVBsFECw7i+3Kg4ItMCRvHlzpJ2/QQ6xW1pDTlUzcX9MNsh9m4I 5+eIJkisejTqeacF+YIbQgrreNXoCoP6RgaCU5dL3Fz4bS6P61zHjKUSsyfI0HZJHKffcBi69r TqyfGdulzKTVsIg7nT9RAUz87sn004wL/9Nn3hDxJws9nayDXJh4/hkQuGWXnoupuDBxGw5pzO Jijcg0wleA6s1poY97SoTQ+T X-IronPort-AV: E=Sophos;i="5.88,368,1635231600"; d="scan'208";a="85633793" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 14 Feb 2022 06:56:44 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 14 Feb 2022 06:56:44 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 14 Feb 2022 06:56:38 -0700 From: To: , , , , , , , , , , , , , , , , , , , CC: , , , , , Palmer Dabbelt Subject: [PATCH v7 07/11] riscv: dts: microchip: add fpga fabric section to icicle kit Date: Mon, 14 Feb 2022 13:58:37 +0000 Message-ID: <20220214135840.168236-8-conor.dooley@microchip.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220214135840.168236-1-conor.dooley@microchip.com> References: <20220214135840.168236-1-conor.dooley@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220214_055646_101618_09D6F5E9 X-CRM114-Status: GOOD ( 11.40 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Conor Dooley Split the device tree for the Microchip MPFS into two sections by adding microchip-mpfs-fabric.dtsi, which contains peripherals contained in the FPGA fabric. Signed-off-by: Conor Dooley Acked-by: Palmer Dabbelt --- .../dts/microchip/microchip-mpfs-fabric.dtsi | 25 +++++++++++++++++++ .../microchip/microchip-mpfs-icicle-kit.dts | 8 ++++++ .../boot/dts/microchip/microchip-mpfs.dtsi | 1 + 3 files changed, 34 insertions(+) create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi new file mode 100644 index 000000000000..854320e17b28 --- /dev/null +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* Copyright (c) 2020-2021 Microchip Technology Inc */ + +/ { + core_pwm0: pwm@41000000 { + compatible = "microchip,corepwm-rtl-v4"; + reg = <0x0 0x41000000 0x0 0xF0>; + microchip,sync-update-mask = /bits/ 32 <0>; + #pwm-cells = <2>; + clocks = <&clkcfg CLK_FIC3>; + status = "disabled"; + }; + + i2c2: i2c@44000000 { + compatible = "microchip,corei2c-rtl-v7"; + reg = <0x0 0x44000000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkcfg CLK_FIC3>; + interrupt-parent = <&plic>; + interrupts = <122>; + clock-frequency = <100000>; + status = "disabled"; + }; +}; diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts index 6d19ba196f12..ab803f71626a 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts @@ -68,6 +68,10 @@ &mmc { sd-uhs-sdr104; }; +&i2c2 { + status = "okay"; +}; + &emac0 { phy-mode = "sgmii"; phy-handle = <&phy0>; @@ -86,3 +90,7 @@ phy1: ethernet-phy@9 { ti,fifo-depth = <0x01>; }; }; + +&core_pwm0 { + status = "okay"; +}; diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index 717e39b30a15..c7d73756c9b8 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -3,6 +3,7 @@ /dts-v1/; #include "dt-bindings/clock/microchip,mpfs-clock.h" +#include "microchip-mpfs-fabric.dtsi" / { #address-cells = <2>;