RISC-V: Drop support for medlow

Commit Message

Palmer Dabbelt April 23, 2022, 1:38 a.m. UTC

medlow affords slightly better generated code, which is nice, but can
only run on a fairly restrictive set of systems.  That includes all
32-bit systems (where medlow is the default), but there don't appear to
be any in production, so this removes support for medlow on rv32 as
well.

Supporting medlow is a bit of a burden: some early boot bits only work
medany, but there's no way to enforce that in the toolchain so we're
stuck with finding bugs at runtime.  This moves the kernel to always be
built as medany.

Signed-off-by: Palmer Dabbelt <[e-mail]>

---

If people are still using this then I'm happy to keep it, but I'm not
sure it's worth the headache any more: the generated code is slightly
faster, which is nice, but as our feature set has grown I've started to
get a feeling that the somewhat restricted set of systems medlow runs on
means it's not actually getting used.  I'm testing it and regularly find
bugs in patches, but I don't really have much of a use for it so if it's
just me keeping this alive then that's a bit silly.

If we have any users then please speak up, as once this goes in the
medlow support will quickly bitrot.  I'll try and circulate this around
as widely as I can.
---
 arch/riscv/Kconfig         | 14 --------------
 arch/riscv/Makefile        | 12 ++----------
 arch/riscv/kernel/Makefile |  2 +-
 3 files changed, 3 insertions(+), 25 deletions(-)

Patch

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 00fd9c548f26..132e0a4020c9 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -243,20 +243,6 @@  config ARCH_RV64I
 
 endchoice
 
-# We must be able to map all physical memory into the kernel, but the compiler
-# is still a bit more efficient when generating code if it's setup in a manner
-# such that it can only map 2GiB of memory.
-choice
-	prompt "Kernel Code Model"
-	default CMODEL_MEDLOW if 32BIT
-	default CMODEL_MEDANY if 64BIT
-
-	config CMODEL_MEDLOW
-		bool "medium low code model"
-	config CMODEL_MEDANY
-		bool "medium any code model"
-endchoice
-
 config MODULE_SECTIONS
 	bool
 	select HAVE_MOD_ARCH_SPECIFIC
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 7d81102cffd4..34ef14543803 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -14,10 +14,6 @@  ifeq ($(CONFIG_DYNAMIC_FTRACE),y)
 	CC_FLAGS_FTRACE := -fpatchable-function-entry=8
 endif
 
-ifeq ($(CONFIG_CMODEL_MEDLOW),y)
-KBUILD_CFLAGS_MODULE += -mcmodel=medany
-endif
-
 export BITS
 ifeq ($(CONFIG_ARCH_RV64I),y)
 	BITS := 64
@@ -58,16 +54,12 @@  riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei
 
 KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
 KBUILD_AFLAGS += -march=$(riscv-march-y)
+KBUILD_CFLAGS += -mcmodel=medany
 
 KBUILD_CFLAGS += -mno-save-restore
 KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
 
-ifeq ($(CONFIG_CMODEL_MEDLOW),y)
-	KBUILD_CFLAGS += -mcmodel=medlow
-endif
-ifeq ($(CONFIG_CMODEL_MEDANY),y)
-	KBUILD_CFLAGS += -mcmodel=medany
-endif
+
 ifeq ($(CONFIG_PERF_EVENTS),y)
         KBUILD_CFLAGS += -fno-omit-frame-pointer
 endif
diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile
index 87adbe47bc15..62474e8b1074 100644
--- a/arch/riscv/kernel/Makefile
+++ b/arch/riscv/kernel/Makefile
@@ -11,7 +11,7 @@  endif
 CFLAGS_syscall_table.o	+= $(call cc-option,-Wno-override-init,)
 
 ifdef CONFIG_KEXEC
-AFLAGS_kexec_relocate.o := -mcmodel=medany $(call cc-option,-mno-relax)
+AFLAGS_kexec_relocate.o := $(call cc-option,-mno-relax)
 endif
 
 extra-y += head.o