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[1/2] riscv: ftrace: Fix the comments about the number of ftrace instruction

Message ID 20220426015751.88582-1-lihuafei1@huawei.com (mailing list archive)
State New, archived
Headers show
Series [1/2] riscv: ftrace: Fix the comments about the number of ftrace instruction | expand

Commit Message

Li Huafei April 26, 2022, 1:57 a.m. UTC
When DYNAMIC_FTRACE is enabled, we put four instructions in front of the
function for ftrace use, not five.

Signed-off-by: Li Huafei <lihuafei1@huawei.com>
---
 arch/riscv/kernel/ftrace.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Guo Ren April 26, 2022, 6:22 a.m. UTC | #1
On Tue, Apr 26, 2022 at 9:59 AM Li Huafei <lihuafei1@huawei.com> wrote:
>
> When DYNAMIC_FTRACE is enabled, we put four instructions in front of the
> function for ftrace use, not five.
>
> Signed-off-by: Li Huafei <lihuafei1@huawei.com>
> ---
>  arch/riscv/kernel/ftrace.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/ftrace.c b/arch/riscv/kernel/ftrace.c
> index 4716f4cdc038..63f457650fa4 100644
> --- a/arch/riscv/kernel/ftrace.c
> +++ b/arch/riscv/kernel/ftrace.c
> @@ -73,7 +73,7 @@ static int __ftrace_modify_call(unsigned long hook_pos, unsigned long target,
>  }
>
>  /*
> - * Put 5 instructions with 16 bytes at the front of function within
> + * Put 4 instructions with 16 bytes at the front of function within
Yeah, 5 instructions are for mcount, -fpatchable-function-entry=8
cause 8 16bit instructions.

Fixes: afc76b8b8011 ("riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT")

I recommend just delete "4 instructions with"
- * Put 5 instructions with 16 bytes at the front of function within
- * patchable function entry nops' area.
+ * Put 16 bytes at the front of the function within the patchable
+ * function entry nops' area.

>   * patchable function entry nops' area.
>   *
>   * 0: REG_S  ra, -SZREG(sp)
> --
> 2.17.1
>
Li Huafei April 26, 2022, 8:52 a.m. UTC | #2
On 2022/4/26 14:22, Guo Ren wrote:
> On Tue, Apr 26, 2022 at 9:59 AM Li Huafei <lihuafei1@huawei.com> wrote:
>> When DYNAMIC_FTRACE is enabled, we put four instructions in front of the
>> function for ftrace use, not five.
>>
>> Signed-off-by: Li Huafei <lihuafei1@huawei.com>
>> ---
>>   arch/riscv/kernel/ftrace.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/riscv/kernel/ftrace.c b/arch/riscv/kernel/ftrace.c
>> index 4716f4cdc038..63f457650fa4 100644
>> --- a/arch/riscv/kernel/ftrace.c
>> +++ b/arch/riscv/kernel/ftrace.c
>> @@ -73,7 +73,7 @@ static int __ftrace_modify_call(unsigned long hook_pos, unsigned long target,
>>   }
>>
>>   /*
>> - * Put 5 instructions with 16 bytes at the front of function within
>> + * Put 4 instructions with 16 bytes at the front of function within
> Yeah, 5 instructions are for mcount, -fpatchable-function-entry=8
> cause 8 16bit instructions.
I misunderstood, thanks for the clarification.
>
> Fixes: afc76b8b8011 ("riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT")
There is no functional fix here, do we need to add the fix tag?
>
> I recommend just delete "4 instructions with"
> - * Put 5 instructions with 16 bytes at the front of function within
> - * patchable function entry nops' area.
> + * Put 16 bytes at the front of the function within the patchable
> + * function entry nops' area.

I agree and will use this modification for the next version, thanks!


Huafei
>
>>    * patchable function entry nops' area.
>>    *
>>    * 0: REG_S  ra, -SZREG(sp)
>> --
>> 2.17.1
>>
>
diff mbox series

Patch

diff --git a/arch/riscv/kernel/ftrace.c b/arch/riscv/kernel/ftrace.c
index 4716f4cdc038..63f457650fa4 100644
--- a/arch/riscv/kernel/ftrace.c
+++ b/arch/riscv/kernel/ftrace.c
@@ -73,7 +73,7 @@  static int __ftrace_modify_call(unsigned long hook_pos, unsigned long target,
 }
 
 /*
- * Put 5 instructions with 16 bytes at the front of function within
+ * Put 4 instructions with 16 bytes at the front of function within
  * patchable function entry nops' area.
  *
  * 0: REG_S  ra, -SZREG(sp)