| Message ID | 20220504203051.1210355-3-mail@conchuod.ie (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | PolarFire SoC dt for 5.19 | expand |
Am Mittwoch, 4. Mai 2022, 22:30:46 CEST schrieb Conor Dooley: > From: Conor Dooley <conor.dooley@microchip.com> > > The MPFS system controller has no registers of its own, so move it out > of the soc node to avoid dtbs_check warnings: > arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dtb: soc: syscontroller: {'compatible': ['microchip,mpfs-sys-controller'], 'mboxes': [[15, 0]], 'status': ['okay']} should not be valid under {'type': 'object'} > > Reported-by: Palmer Dabbelt <palmer@rivosinc.com> > Suggested-by: Rob Herring <robh@kernel.org> > Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree") > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> > --- > arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > index 746c4d4e7686..bf21a2edd180 100644 > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > @@ -146,6 +146,11 @@ refclk: mssrefclk { > #clock-cells = <0>; > }; > > + syscontroller: syscontroller { > + compatible = "microchip,mpfs-sys-controller"; > + mboxes = <&mbox 0>; > + }; > + > soc { > #address-cells = <2>; > #size-cells = <2>; > @@ -446,10 +451,5 @@ mbox: mailbox@37020000 { > #mbox-cells = <1>; > status = "disabled"; > }; > - > - syscontroller: syscontroller { > - compatible = "microchip,mpfs-sys-controller"; > - mboxes = <&mbox 0>; > - }; > }; > }; >
diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index 746c4d4e7686..bf21a2edd180 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -146,6 +146,11 @@ refclk: mssrefclk { #clock-cells = <0>; }; + syscontroller: syscontroller { + compatible = "microchip,mpfs-sys-controller"; + mboxes = <&mbox 0>; + }; + soc { #address-cells = <2>; #size-cells = <2>; @@ -446,10 +451,5 @@ mbox: mailbox@37020000 { #mbox-cells = <1>; status = "disabled"; }; - - syscontroller: syscontroller { - compatible = "microchip,mpfs-sys-controller"; - mboxes = <&mbox 0>; - }; }; };