diff mbox series

riscv: traps_misaligned: do not duplicate stringify

Message ID 20220623112905.253157-1-krzysztof.kozlowski@linaro.org (mailing list archive)
State New, archived
Headers show
Series riscv: traps_misaligned: do not duplicate stringify | expand

Commit Message

Krzysztof Kozlowski June 23, 2022, 11:29 a.m. UTC
Use existing stringify macro from the kernel headers.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/riscv/kernel/traps_misaligned.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

Comments

Anup Patel June 23, 2022, 1:11 p.m. UTC | #1
On Thu, Jun 23, 2022 at 4:59 PM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> Use existing stringify macro from the kernel headers.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  arch/riscv/kernel/traps_misaligned.c | 8 +++-----
>  1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
> index 46c4dafe3ba0..378f5b151443 100644
> --- a/arch/riscv/kernel/traps_misaligned.c
> +++ b/arch/riscv/kernel/traps_misaligned.c
> @@ -7,6 +7,7 @@
>  #include <linux/mm.h>
>  #include <linux/module.h>
>  #include <linux/irq.h>
> +#include <linux/stringify.h>
>
>  #include <asm/processor.h>
>  #include <asm/ptrace.h>
> @@ -150,9 +151,6 @@
>  #define PRECISION_S 0
>  #define PRECISION_D 1
>
> -#define STR(x) XSTR(x)
> -#define XSTR(x) #x
> -
>  #define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)                 \
>  static inline type load_##type(const type *addr)                       \
>  {                                                                      \
> @@ -207,9 +205,9 @@ static inline ulong get_insn(ulong mepc)
>         asm ("and %[tmp], %[addr], 2\n"
>                 "bnez %[tmp], 1f\n"
>  #if defined(CONFIG_64BIT)
> -               STR(LWU) " %[insn], (%[addr])\n"
> +               __stringify(LWU) " %[insn], (%[addr])\n"
>  #else
> -               STR(LW) " %[insn], (%[addr])\n"
> +               __stringify(LW) " %[insn], (%[addr])\n"
>  #endif
>                 "and %[tmp], %[insn], %[rvc_mask]\n"
>                 "beq %[tmp], %[rvc_mask], 2f\n"
> --
> 2.34.1
>
Krzysztof Kozlowski July 21, 2022, 4:02 p.m. UTC | #2
On 23/06/2022 15:11, Anup Patel wrote:
> On Thu, Jun 23, 2022 at 4:59 PM Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> Use existing stringify macro from the kernel headers.
>>
>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 
> Looks good to me.
> 
> Reviewed-by: Anup Patel <anup@brainfault.org>
> 

Thanks!

Any other comments or reviews? This was sent a month ago, so maybe it
could be merged?


Best regards,
Krzysztof
Palmer Dabbelt Aug. 11, 2022, 3:45 p.m. UTC | #3
On Thu, 23 Jun 2022 04:29:05 PDT (-0700), krzysztof.kozlowski@linaro.org wrote:
> Use existing stringify macro from the kernel headers.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
>  arch/riscv/kernel/traps_misaligned.c | 8 +++-----
>  1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
> index 46c4dafe3ba0..378f5b151443 100644
> --- a/arch/riscv/kernel/traps_misaligned.c
> +++ b/arch/riscv/kernel/traps_misaligned.c
> @@ -7,6 +7,7 @@
>  #include <linux/mm.h>
>  #include <linux/module.h>
>  #include <linux/irq.h>
> +#include <linux/stringify.h>
>
>  #include <asm/processor.h>
>  #include <asm/ptrace.h>
> @@ -150,9 +151,6 @@
>  #define PRECISION_S 0
>  #define PRECISION_D 1
>
> -#define STR(x) XSTR(x)
> -#define XSTR(x) #x
> -
>  #define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)			\
>  static inline type load_##type(const type *addr)			\
>  {									\
> @@ -207,9 +205,9 @@ static inline ulong get_insn(ulong mepc)
>  	asm ("and %[tmp], %[addr], 2\n"
>  		"bnez %[tmp], 1f\n"
>  #if defined(CONFIG_64BIT)
> -		STR(LWU) " %[insn], (%[addr])\n"
> +		__stringify(LWU) " %[insn], (%[addr])\n"
>  #else
> -		STR(LW) " %[insn], (%[addr])\n"
> +		__stringify(LW) " %[insn], (%[addr])\n"
>  #endif
>  		"and %[tmp], %[insn], %[rvc_mask]\n"
>  		"beq %[tmp], %[rvc_mask], 2f\n"

Thanks, this is on for-next.
diff mbox series

Patch

diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
index 46c4dafe3ba0..378f5b151443 100644
--- a/arch/riscv/kernel/traps_misaligned.c
+++ b/arch/riscv/kernel/traps_misaligned.c
@@ -7,6 +7,7 @@ 
 #include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/irq.h>
+#include <linux/stringify.h>
 
 #include <asm/processor.h>
 #include <asm/ptrace.h>
@@ -150,9 +151,6 @@ 
 #define PRECISION_S 0
 #define PRECISION_D 1
 
-#define STR(x) XSTR(x)
-#define XSTR(x) #x
-
 #define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn)			\
 static inline type load_##type(const type *addr)			\
 {									\
@@ -207,9 +205,9 @@  static inline ulong get_insn(ulong mepc)
 	asm ("and %[tmp], %[addr], 2\n"
 		"bnez %[tmp], 1f\n"
 #if defined(CONFIG_64BIT)
-		STR(LWU) " %[insn], (%[addr])\n"
+		__stringify(LWU) " %[insn], (%[addr])\n"
 #else
-		STR(LW) " %[insn], (%[addr])\n"
+		__stringify(LW) " %[insn], (%[addr])\n"
 #endif
 		"and %[tmp], %[insn], %[rvc_mask]\n"
 		"beq %[tmp], %[rvc_mask], 2f\n"