@@ -34,7 +34,7 @@ static int riscv_clock_next_event(unsigned long delta,
static unsigned int riscv_clock_event_irq;
static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = {
.name = "riscv_timer_clockevent",
- .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP,
+ .features = CLOCK_EVT_FEAT_ONESHOT,
.rating = 100,
.set_next_event = riscv_clock_next_event,
};
@@ -65,9 +65,13 @@ static struct clocksource riscv_clocksource = {
static int riscv_timer_starting_cpu(unsigned int cpu)
{
struct clock_event_device *ce = per_cpu_ptr(&riscv_clock_event, cpu);
+ struct device_node *np = of_get_cpu_node(cpu, NULL);
ce->cpumask = cpumask_of(cpu);
ce->irq = riscv_clock_event_irq;
+ if (!of_property_read_bool(np, "riscv,timer-can-wake-cpu"))
+ ce->features |= CLOCK_EVT_FEAT_C3STOP;
+ of_node_put(np);
clockevents_config_and_register(ce, riscv_timebase, 100, 0x7fffffff);
enable_percpu_irq(riscv_clock_event_irq,
We should set CLOCK_EVT_FEAT_C3STOP for a clock_event_device only when riscv,timer-can-wake-cpu DT property is not present for the corresponding CPU. This way CLOCK_EVT_FEAT_C3STOP feature is set for clock_event_device based on RISC-V platform capabilities rather than having it set for all RISC-V platforms. Signed-off-by: Anup Patel <apatel@ventanamicro.com> --- drivers/clocksource/timer-riscv.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)