| Message ID | 20220906121921.8355-1-tjytimi@163.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v1] riscv : support update_mmu_tlb() for riscv | expand |
On Tue, Sep 06, 2022 at 08:19:21PM +0800, Jinyu Tang wrote: > Add macro definition to support updata_mmu_tlb() for riscv, > this function is from commit:7df676974359 ("mm/memory.c:Update > local TLB if PTE entry exists"). > > Signed-off-by: Jinyu Tang <tjytimi@163.com> > --- > arch/riscv/include/asm/pgtable.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h > index 7ec936910a96..84a791d54f95 100644 > --- a/arch/riscv/include/asm/pgtable.h > +++ b/arch/riscv/include/asm/pgtable.h > @@ -418,6 +418,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, > local_flush_tlb_page(address); > } > > +#define __HAVE_ARCH_UPDATE_MMU_TLB ^ just a single space here, please, as all the other 'define __HAVE's in this file > +#define update_mmu_tlb update_mmu_cache > + > static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, > unsigned long address, pmd_t *pmdp) > { > -- > 2.30.2 This seems like the right thing to do, so Reviewed-by: Andrew Jones <ajones@ventanamicro.com> I'm curious if this patch is the result of debugging something? Or what led you to post it? Thanks, drew
On 06/09/2022 15:41, Andrew Jones wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On Tue, Sep 06, 2022 at 08:19:21PM +0800, Jinyu Tang wrote: > [PATCH v1] riscv : support update_mmu_tlb() for riscv Another nit to fix when you sort out Drew's request below, drop the space between riscv & : please. Thanks, Conor. >> Add macro definition to support updata_mmu_tlb() for riscv, >> this function is from commit:7df676974359 ("mm/memory.c:Update >> local TLB if PTE entry exists"). >> >> Signed-off-by: Jinyu Tang <tjytimi@163.com> >> --- >> arch/riscv/include/asm/pgtable.h | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h >> index 7ec936910a96..84a791d54f95 100644 >> --- a/arch/riscv/include/asm/pgtable.h >> +++ b/arch/riscv/include/asm/pgtable.h >> @@ -418,6 +418,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, >> local_flush_tlb_page(address); >> } >> >> +#define __HAVE_ARCH_UPDATE_MMU_TLB > ^ just a single space here, please, as all the other > 'define __HAVE's in this file > >> +#define update_mmu_tlb update_mmu_cache >> + >> static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, >> unsigned long address, pmd_t *pmdp) >> { >> -- >> 2.30.2 > > This seems like the right thing to do, so > > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > > I'm curious if this patch is the result of debugging something? Or what > led you to post it? > > Thanks, > drew
Jinyu
Jinyu
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 7ec936910a96..84a791d54f95 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -418,6 +418,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, local_flush_tlb_page(address); } +#define __HAVE_ARCH_UPDATE_MMU_TLB +#define update_mmu_tlb update_mmu_cache + static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long address, pmd_t *pmdp) {
Add macro definition to support updata_mmu_tlb() for riscv, this function is from commit:7df676974359 ("mm/memory.c:Update local TLB if PTE entry exists"). Signed-off-by: Jinyu Tang <tjytimi@163.com> --- arch/riscv/include/asm/pgtable.h | 3 +++ 1 file changed, 3 insertions(+)